You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Hi guys!
I'm trying to integrate the LPM IP core included in SDNet 2018.2 inside a custom design but, on the custom (non-AXI) interface that the LPM exposes, I obtain only Xs whenever I try to lookup something.
Do you have any experience with that?
I'm configuring the core through the AXI Sim Transactor with the same configuration commands you find inside the p4-->NetFPGA project. I attach screenshots.
The text was updated successfully, but these errors were encountered:
Hi guys!
I'm trying to integrate the LPM IP core included in SDNet 2018.2 inside a custom design but, on the custom (non-AXI) interface that the LPM exposes, I obtain only Xs whenever I try to lookup something.
Do you have any experience with that?
I'm configuring the core through the AXI Sim Transactor with the same configuration commands you find inside the p4-->NetFPGA project. I attach screenshots.
The text was updated successfully, but these errors were encountered: