Multiple AXI-Lite interfaces in one user box (AXI Crossbar or Demultiplexer?)

[DavidoTek]

Hi everyone,

we're currently working on a plugin for the 250MHz user box that includes two VitisNetP4 instances and a custom PIFO (Push-In First-Out) queue in between. Our P4 implementation is based on https://github.com/OCT-FPGA/P4Framework.

When there is a single VitisNetP4 instance, it is directly connected to the AXI-Lite interface of the user box and it can be addressed at address 0x100000 from the host.
How can multiple AXI-Lite slaves be connected to the AXI-Lite interface? We thought about the following approaches:

1. Add an AXI-Lite switch/demultiplexer to the user box (e.g., https://github.com/pulp-platform/axi/blob/master/src/axi_lite_demux.sv) or add an additional AXI crossbar IP
2. Somehow modify the AXI crossbar in the glue logic of the user box to handle additional AXI-Lite slaves. We noticed that there is at least one AXI-Lite interface per physical function/interface and increasing NUM_INTF increases the number of AXI-Lite interfaces, but I think it makes the most sense to keep NUM_INTF at 1 if only one is used.

What approaches can you recommend, do you have any further ideas? Can someone provide us with an example that shows similar behavior?

Thanks!

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Update: We decided to focus on modifying the AXI crossbar in the user box's glue logic because it does not involve any additional components.

Although we have not yet tested it, steps similar to the following ones should yield the expected result:

1. Add an additional AXI-Lite interface to the p2p_250mhz module (p2p_250mhz.sv)
2. Adjust the AXI-Lite interfaces in box_250mhz_address_map_inst.vh and user_plugin_250mhz_inst.vh accordingly
3. Also add the new interface in box_250mhz_address_map.v. C_NUM_SLAVES needs to be increased by 1, new ..._INDEX and ..._ADDR parameters need to be added and new connections/assignments are required.
4. The new interface is configured in box_250mhz_axi_crossbar.tcl: Increase CONFIG.NUM_MI by 1 and add CONFIG.Mmm_Aaa_BASE_ADDR and CONFIG.Mmm_Aaa_ADDR_WIDTH for the new interface (see PG059: AXI Interconnect v2 , page 107)