diff --git a/conversion.py b/conversion.py index 3161089..b650b50 100644 --- a/conversion.py +++ b/conversion.py @@ -34,6 +34,8 @@ def single_to_double(val): def int_to_hex_str(i): assert isinstance(i, int) + if i < 0: + i += 2**32 val = hex(i)[2:] val = "0" * (8 - len(val)) + val assert(len(val) == 8) @@ -42,7 +44,10 @@ def int_to_hex_str(i): def hex_str_to_int(s): assert(len(s) == 8) - return int(s, 16) + val = int(s, 16) + if val & 0x800000000: + val -= 2**32 + return val def hex_str_to_single(s): @@ -70,11 +75,20 @@ def double_to_hex_str(f): assert(len(val) == 16) return val + def int_to_bin_str(i): assert isinstance(i, int) if i < 0: - i += 2**32 # two's compliment + i += 2**32 val = bin(i)[2:] val = "0" * (32 - len(val)) + val assert len(val) == 32 return val + + +def bin_str_to_int(s): + assert(len(s) == 32) + val = int(s, 2) + if val & 0x800000000: + val -= 2**32 + return val diff --git a/execution.py b/execution.py index 0e62aa7..3eefb1a 100644 --- a/execution.py +++ b/execution.py @@ -15,6 +15,7 @@ def __init__(self, start_address, starting_ram={}, starting_registers={}): self.write_hex_str_to_ram(key, val) self.cr0 = None self.cr1 = None + self.ctr = None def print_line(self): print(hex(self.current_address), SOURCE[self.current_address]) @@ -51,10 +52,6 @@ def read_hex_str_from_ram(self, address, byte_len): """ read specified number of bytes from ram starting at given address """ - if address in (0x809e5474, 0x809e5475, 0x809e5476, 0x809e5478, - 0x809e547c, 0x809e547d, 0x809e547e, 0x809e547f): - print("reading from current position") - ret = "" for i in range(byte_len): try: @@ -73,7 +70,7 @@ def print_registers(self): print("{}: {}".format(key, double_to_hex_str(val))) else: print("{}: {}".format(key, val)) - print("UNEXPECTED TYPE: {}".format(type(val))) + raise TypeError("UNEXPECTED TYPE: {}".format(type(val))) print("") def execute(self): @@ -95,7 +92,7 @@ def execute(self): self.print_line() input("press Enter to run line") - f = method_to_call = getattr(functions, args[0].strip("-+.")) + f = getattr(functions, args[0].strip("-+").replace(".", "_cr")) try: f(self, *args[1:]) diff --git a/functions.py b/functions.py index c15117a..755df65 100644 --- a/functions.py +++ b/functions.py @@ -52,6 +52,14 @@ def lfd(state, rt, offset, ra): state.current_address += 4 +def lfdx(state, rt, ra, rb): + ea = state.registers[ra] + state.registers[rb] + hex_str = state.read_hex_str_from_ram(ea, 8) + val = hex_str_to_double(hex_str) + state.registers[rt] = val + state.current_address += 4 + + def lwz(state, rt, offset, ra): ra = ra.strip("()") offset = int(offset, 16) @@ -192,6 +200,15 @@ def fmuls(state, rt, ra, rc): state.current_address += 4 +def fdiv(state, rt, ra, rc): + val_a = state.registers[ra] + val_c = state.registers[rc] + assert isinstance(val_a, float) + assert isinstance(val_c, float) + state.registers[rt] = val_a / val_c + state.current_address += 4 + + def fdivs(state, rt, ra, rc): val_a = state.registers[ra] val_c = state.registers[rc] @@ -273,7 +290,10 @@ def add(state, rt, ra, rb): val_b = state.registers[rb] assert isinstance(val_a, int) assert isinstance(val_b, int) - state.registers[rt] = val_a + val_b + val = (val_a + val_b) & 0xffffffff + if val & 0x800000000: + val -= 2*32 + state.registers[rt] = val state.current_address += 4 @@ -294,6 +314,12 @@ def sub(state, rt, ra, rb): state.current_address += 4 +def sub_cr(state, rt, ra, rb): + sub(state, rt, ra, rb) + state.cr0 = state.registers[rt] + state.cr1 = 0 + + def subi(state, rt, ra, i): i = int(i) val = state.registers[ra] @@ -307,12 +333,13 @@ def subic(state, rt, ra, i): val = state.registers[ra] assert isinstance(val, int) state.registers[rt] = val - i + state.current_address += 4 - # fix this? - state.cr0 = val - i - state.cr1 = 0 - state.current_address += 4 +def subic_cr(state, rt, ra, i): + subic(state, rt, ra, i) + state.cr0 = state.registers[rt] + state.cr1 = 0 def subis(state, rt, ra, i): @@ -325,26 +352,46 @@ def subis(state, rt, ra, i): def rlwinm(state, ra, rs, sh, mb, me, m): sh = int(sh) - m = int(m.strip("()"), 16) + mb = int(mb) + me = int(me) val = state.registers[rs] assert isinstance(val, int) # bit rotate left assert(sh < 32) - b = bin(val)[2:] - b = "0" * (32- len(b)) + b + b = int_to_bin_str(val) + b = "0" * (32 - len(b)) + b assert len(b) == 32 b = b[sh:] + b[:sh] - val = int(b, 2) + val = bin_str_to_int(b) + + # generate mask + if mb < me + 1: + mask_bits = ( + "0" * mb + + "1" * ((me + 1) - mb) + + "0" * (32 - (me + 1))) + if mb == me + 1: + mask_bits = "1" * 32 + if mb > me + 1: + raise Exception("implement rlwinm") - # mask - state.registers[ra] = val & m + # mask and + mask = bin_str_to_int(mask_bits) + state.registers[ra] = val & mask state.current_address += 4 +def rlwinm_cr(state, ra, rs, sh, mb, me, m): + rlwinm(state, ra, rs, sh, mb, me, m) + state.cr0 = state.registers[ra] + state.cr1 = 0 + + def rlwimi(state, ra, rs, sh, mb, me, m): sh = int(sh) - m = int(m.strip("()"), 16) + mb = int(mb) + me = int(me) val_a = state.registers[ra] val_s = state.registers[rs] assert isinstance(val_a, int) @@ -352,14 +399,26 @@ def rlwimi(state, ra, rs, sh, mb, me, m): # bit rotate left assert(sh < 32) - b = bin(val_s)[2:] - b = "0" * (32- len(b)) + b + b = int_to_bin_str(val_s) + b = "0" * (32 - len(b)) + b assert len(b) == 32 b = b[sh:] + b[:sh] - val_s = int(b, 2) + val_s = bin_str_to_int(b) + + # generate mask + if mb < me + 1: + mask_bits = ( + "0" * mb + + "1" * ((me + 1) - mb) + + "0" * (32 - (me + 1))) + if mb == me + 1: + mask_bits = "1" * 32 + if mb > me + 1: + raise Exception("implement rlwimi") # mask insert - state.registers[ra] = (val_a & ~m) | (val_s & m) + mask = bin_str_to_int(mask_bits) + state.registers[ra] = (val_a & ~mask) | (val_s & mask) state.current_address += 4 @@ -485,6 +544,13 @@ def beqlr(state): state.current_address += 4 +def bdnz(state, pointer): + if state.ctr == 0: + state.current_address = int(pointer[2:], 16) + else: + state.current_address += 4 + + def fctiwz(state, rt, rb): val = state.registers[rb] assert isinstance(val, float) @@ -533,6 +599,12 @@ def mr(state, rt, rb): state.current_address += 4 +def mr_cr(state, rt, rb): + mr(state, rt, rb) + state.cr0 = state.registers[rt] + state.cr1 = 0 + + def fabs(state, rt, rb): val = state.registers[rb] assert isinstance(val, float) @@ -551,6 +623,17 @@ def xoris(state, ra, rs, i): state.current_address += 4 +def oris(state, ra, rs, i): + try: + i = int(i) + except: + i = int(i, 16) + val = state.registers[rs] + assert isinstance(val, int) + state.registers[ra] = val | (i << 16) + state.current_address += 4 + + def fadd(state, rt, ra, rb): val_a = state.registers[ra] val_b = state.registers[rb] @@ -603,7 +686,14 @@ def fnmsub(state, rt, ra, rc, rb): def fneg(state, rt, rb): val = state.registers[rb] assert isinstance(val, float) - state.registers[rb] = val * -1 + state.registers[rt] = val * -1.0 + state.current_address += 4 + + +def neg(state, rt, rb): + val = state.registers[rb] + assert isinstance(val, int) + state.registers[rt] = ~val + 1 state.current_address += 4 @@ -720,3 +810,32 @@ def ps_muls0(state, rt, rab): state.registers[rt.replace("p", "f")] = val_a0 * val_b0 state.registers[rt] = val_a1 * val_b0 state.current_address += 4 + + +def ior(state, rt, ra, rb): + val_a = state.registers[ra] + val_b = state.registers[rb] + assert isinstance(val_a, int) + assert isinstance(val_b, int) + state.registers[rt] = val_a | val_b + state.current_address += 4 + + +def ior_cr(state, rt, ra, rb): + ior(state, rt, ra, rb) + state.cr0 = state.registers[rt] + state.cr1 = 0 + + +def xor(state, rt, ra, rb): + val_a = state.registers[ra] + val_b = state.registers[rb] + assert isinstance(val_a, int) + assert isinstance(val_b, int) + state.registers[rt] = val_a ^ val_b + state.current_address += 4 + + +def mtctr(state, ra): + state.ctr = state.registers[ra] + state.current_address += 4 diff --git a/npc.py b/npc.py index 81a3d5e..6e71cfe 100644 --- a/npc.py +++ b/npc.py @@ -5,41 +5,46 @@ class for simulating NPC interactions with pRNG from conversion import * from execution import PPC_executor -CALCING_DEST = 0 +WAITING = 0 WALKING = 1 -WAITING = 2 class NPC(): def __init__(self, lcg, startingX, startingY): self.lcg = lcg - self.wait_time = 0 + self.wait_time = float32(0.0) self.walk_speed = float32(0.0) self.currentX = startingX self.currentY = startingY - self.state = CALCING_DEST + self.nextX = None + self.nextY = None + self.state = WAITING self.first_step = True def step(self): """ simulates one frame of NPC action """ - if self.state == CALCING_DEST: - self.set_walk_dest() - self.set_walk_speed() - self.state = WALKING - - elif self.state == WALKING: + if self.state == WALKING: self.walk() - if (self.currentX == self.destX and - self.currentY == self.destY): + if (self.nextX == self.destX and + self.nextY == self.destY): self.set_wait_time() self.state = WAITING elif self.state == WAITING: - if self.wait_time == 0: - self.state == CALCING_DEST + if self.nextX: + self.currentX = self.destX + self.nextX = None + if self.nextY: + self.currentY = self.destY + self.nextX = None + + if self.wait_time <= float32(0.0): + self.set_walk_params() + self.walk() + self.state = WALKING else: self.wait() @@ -50,7 +55,7 @@ def set_wait_time(self): prn1 = self.lcg.generate() prn2 = self.lcg.generate() rand = (prn1 + prn2) - 1.0 # constant from rtoc - self.wait_time = (3.0 * rand) + 5.0 # constants from r31 + self.wait_time = float32((3.0 * rand) + 5.0) # constants from r31 def wait(self): """ @@ -61,14 +66,14 @@ def wait(self): if val >= 0: self.wait_time = double_to_single(val) else: - self.wait_time == float32(0.0) + self.wait_time = float32(0.0) - def set_walk_dest(self): + def set_walk_params(self): """ executes logic for selecting a pseudo random walk destination + and walk speed """ prn = self.lcg.generate() - print(prn, double_to_hex_str(prn)) starting_ram = { 0x809e5458: "41700000", @@ -79,37 +84,11 @@ def set_walk_dest(self): 0x809e5454: "41c0000041700000", 0x8048e610: "00000000", 0x8048e618: "ffffffff", - } - starting_registers = { - "sp": 0x8048e5e0, - "r30": 0x809e53d8, - "r31": 0x809e53d8, - "f1": prn, - } - exc = PPC_executor(0x80184e64, starting_ram, starting_registers) - exc.execute() - self.destX = hex_str_to_single( - exc.read_hex_str_from_ram(0x809e5434, 4)) - self.destY = hex_str_to_single( - exc.read_hex_str_from_ram(0x809e543c, 4)) - def set_walk_speed(self): - """ - executes logic for selecting a walk speed - """ - starting_ram = { - 0x80273fc0: "00000000", - 0x80273fc4: "00000000", - 0x80273fc8: "00000000", - 0x809e542d: "00", # non constant? 0x809e53e0: "8050f0c0", - 0x809e5434: "40327ef700000000", - 0x8050f0d8: "4080000000000000", # current x? - 0x809e543c: "421bcddc00000000", - 0x8050f0e0: "41c0000000000000", # current y? - 0x809e5400: "00000020", + 0x8050f0dc: "00000000", 0x809e5404: "00000000", - 0x809e5430: "3f800000", + 0x809e5400: "00000020", 0x8047b1f8: "00000030", 0x8047b200: "809e5220", 0x809e5220: "01", @@ -120,35 +99,45 @@ def set_walk_speed(self): 0x809e53dc: "809e53d8", 0x809e5224: "809e5220", 0x809e5300: "809e52fc", - 0x8050f0c0: "10113027", # variable, but unused? - 0x8050f160: "41f00000", - 0x8047aa94: "0000003c", - 0x809e540c: "3e94a529", - 0x8031554c: "00000000", - 0x80315550: "3f800000", - 0x80315550: "00000000", - 0x8047aa80: "e0000000", - 0x809e545c: "00000000", - - 0x809e5418: single_to_hex_str(self.walk_speed), - - 0xe0000054: "00000001", # ???? + + 0x8050f0e4: "000000000000000000000000", + + 0x80270348: "3f90ad3ae322da11", + 0x80270338: "3fa97b4b24760deb", + 0x80270328: "3fb10d66a0d03d51", + 0x80270340: "bfa2b4442c6a6c2f", + 0x80270330: "bfadde2d52defd9a", + 0x80270318: "3fb745cdc54c206e", + 0x80270320: "bfb3b0f2af749a6d", + 0x80270308: "3fc24924920083ff", + 0x80270310: "bfbc71c6fe231671", + 0x802702f8: "3fd555555555550d", + 0x80270300: "bfc999999998ebc4", + 0x802702f0: "3c9aa62633145c07", + 0x802702d0: "3ff921fb54442d18", + 0x802702d8: "3c7a2b7f222f65e2", + 0x802702b8: "3fddac670561bb4f", + 0x802702e0: "3c81a62633145c07", + 0x802702c0: "3fe921fb54442d18", + 0x802702e8: "3c7007887af0cbbd", + 0x802702c8: "3fef730bd281f69b", + 0x8050f0d8: single_to_hex_str(self.currentX), + 0x8050f0e0: single_to_hex_str(self.currentY), } starting_registers = { "sp": 0x8048e5e0, - "r3": 0x809e53d8, "r13": 0x80480820, - "r28": 0x00000001, - "r29": 0x807f1048, "r30": 0x809e53d8, - "f30": hex_str_to_double("ffffffffffffffff"), - "p30": hex_str_to_double("4070000000000000"), - "f31": hex_str_to_double("0000000000000000"), - "p31": hex_str_to_double("0000000000000000"), + "r31": 0x809e53d8, + "f1": prn, } - exc = PPC_executor(0x80184d98, starting_ram, starting_registers) + exc = PPC_executor(0x80184e64, starting_ram, starting_registers) exc.execute() + self.destX = hex_str_to_single( + exc.read_hex_str_from_ram(0x809e5434, 4)) + self.destY = hex_str_to_single( + exc.read_hex_str_from_ram(0x809e543c, 4)) self.walk_speed = hex_str_to_single( exc.read_hex_str_from_ram(0x809e5418, 4)) @@ -169,7 +158,7 @@ def walk(self): "f1": hex_str_to_double("3ff0000000000000"), "f30": hex_str_to_double("ffffffffffffffff"), "p30": hex_str_to_double("4070000000000000"), - "f31": hex_str_to_double("402d6b5aa0000000"), # unused? seems speed related + "f31": hex_str_to_double("402d6b5aa0000000"), # unused? "p31": hex_str_to_double("0000000000000000"), } starting_ram = { @@ -196,8 +185,6 @@ def walk(self): 0x8047aa80: "e0000000", 0x809e5418: single_to_hex_str(self.walk_speed), - 0x8050f0d8: single_to_hex_str(self.currentX), - 0x8050f0e0: single_to_hex_str(self.currentY), # changes between some steps, but doesn't seem to be used 0x8050f0c0: "10102027", @@ -210,23 +197,38 @@ def walk(self): else: starting_ram[0xe0000054] = "00000002" + # if this is the first step in the walk, use current vals for calc + if self.nextX is None: + starting_ram[0x8050f0d8] = single_to_hex_str(self.currentX) + else: + starting_ram[0x8050f0d8] = single_to_hex_str(self.nextX) + + if self.nextY is None: + starting_ram[0x8050f0e0] = single_to_hex_str(self.currentY) + else: + starting_ram[0x8050f0e0] = single_to_hex_str(self.nextY) + exc = PPC_executor(0x80188214, starting_ram, starting_registers) exc.execute() - nextX = hex_str_to_single( + calcedX = hex_str_to_single( exc.read_hex_str_from_ram(0x8048e540, 4)) - nextY = hex_str_to_single( + calcedY = hex_str_to_single( exc.read_hex_str_from_ram(0x8048e548, 4)) - # check if we would pass the destination and if so set to it - if ((self.currentX <= self.destX and self.destX <= nextX) or - (self.currentX >= self.destX and self.destX >= nextX)): - self.currentX = self.destX - else: - self.currentX = nextX - - if ((self.currentY <= self.destY and self.destY <= nextY) or - (self.currentY >= self.destY and self.destY >= nextY)): - self.currentY = self.destY - else: - self.currentY = nextY \ No newline at end of file + # check if we would pass the destination and if so stop at it + if (self.nextX and ((self.nextX <= self.destX and self.destX <= calcedX) or + (self.nextX >= self.destX and self.destX >= calcedX))): + calcedX = self.destX + + if (self.nextY and ((self.nextY <= self.destY and self.destY <= calcedY) or + (self.nextY >= self.destY and self.destY >= calcedY))): + calcedY = self.destY + + # move to next vals + if self.nextX: + self.currentX = self.nextX + self.nextX = calcedX + if self.nextY: + self.currentY = self.nextY + self.nextY = calcedY diff --git a/prng_analyzer.py b/prng_predictor.py similarity index 72% rename from prng_analyzer.py rename to prng_predictor.py index 97da4af..a9dbcda 100644 --- a/prng_analyzer.py +++ b/prng_predictor.py @@ -57,20 +57,37 @@ def pyrite_noise(prng_state, noise_state): input("press ENTER to continue") """ - seed =0xed60636d + seed = 0xed60636d lcg = LCG(seed) npc = NPC(lcg, float32(4.0), float32(24.0)) - npc.step() # calc dest - + + for i in range(1, 52000): + npc.step() + print("step: ", i) + print("prng: ", int_to_hex_str(lcg.state)) + print("destX: ", single_to_hex_str(npc.destX)) + print("destY: ", single_to_hex_str(npc.destY)) + print("speed: ", single_to_hex_str(npc.walk_speed)) + print("currentX: ", single_to_hex_str(npc.currentX)) + print("currentY: ", single_to_hex_str(npc.currentY)) + print("wait_time: ", single_to_hex_str(npc.wait_time)) + if i >= 165: + input("press ENTER to continue") + print() + + ''' + npc.step() assert single_to_hex_str(npc.destX) == "40327ef7" assert single_to_hex_str(npc.destY) == "421bcddc" - assert single_to_hex_str(npc.walk_speed) == "bda585a9" + if single_to_hex_str(npc.walk_speed) != "bda585a9": + raise ValueError(single_to_hex_str(npc.walk_speed)) for step in paths[0]: - npc.step() # walk a step + npc.step() if single_to_hex_str(npc.currentX).lower() != step[0].lower(): raise ValueError("unexpected currentX", single_to_hex_str(npc.currentX), step[0]) if single_to_hex_str(npc.currentY).lower() != step[1].lower(): raise ValueError("unexpected currentY", single_to_hex_str(npc.currentY), step[1]) print("good step!") + ''' diff --git a/rtoc.py b/rtoc.py index af097d0..41ae807 100644 --- a/rtoc.py +++ b/rtoc.py @@ -50,4 +50,13 @@ -0x6D90: 0.0, -0x5ED0: 4503599627370496.0, -0x5ED8: 4503601774854144.0, + -0x5EB0: 6.283185307179586, + -0x5EF8: 3.141592653589793, + -0x5E80: -3.141592653589793, + -0x7128: float("1.2246467991473532e-16"), + -0x7178: 3.141592653589793, + -0x6DA8: -1.0, + -0x6DB8: 2.0, + -0x6DC0: 1.0, + -0x6DB0: 1.5, } diff --git a/source.py b/source.py index fe64518..c7d80ab 100644 --- a/source.py +++ b/source.py @@ -1,28 +1,143 @@ # dict of address: code SOURCE = { - # Dest calc: + # Walk params calc: 0x80184e64: "lfs f2, -0x5EDC (rtoc)", 0x80184e68: "lfs f0, -0x5E88 (rtoc)", - 0x80184e6c: "fmuls f1,f2,f1", - 0x80184e70: "fmuls f31,f0,f1", + 0x80184e6c: "fmuls f1,f2,f1", + 0x80184e70: "fmuls f31,f0,f1", 0x80184e74: "fmr f1, f31", - 0x80184e78: "bl ->0x800CE148", + 0x80184e78: "bl ->0x800CE148", 0x80184e7c: "lfs f0, 0x0080 (r31)", - 0x80184e80: "fmul f0,f0,f1", + 0x80184e80: "fmul f0,f0,f1", 0x80184e84: "fmr f1, f31", - 0x80184e88: "frsp f0,f0", - 0x80184e8c: "stfs f0, 0x002C (sp)", - 0x80184e90: "bl ->0x800CDBE0", + 0x80184e88: "frsp f0,f0", + 0x80184e8c: "stfs f0, 0x002C (sp)", + 0x80184e90: "bl ->0x800CDBE0", 0x80184e94: "lfs f0, 0x0080 (r31)", - 0x80184e98: "addi r3, r31, 92", - 0x80184e9c: "addi r4, r31, 116", - 0x80184ea0: "addi r5, sp, 44", - 0x80184ea4: "fmul f0,f0,f1", - 0x80184ea8: "frsp f0,f0", - 0x80184eac: "stfs f0, 0x0034 (sp)", + 0x80184e98: "addi r3, r31, 92", + 0x80184e9c: "addi r4, r31, 116", + 0x80184ea0: "addi r5, sp, 44", + 0x80184ea4: "fmul f0,f0,f1", + 0x80184ea8: "frsp f0,f0", + 0x80184eac: "stfs f0, 0x0034 (sp)", 0x80184eb0: "bl ->0x800E019C", + 0x80184eb4: "mr r3, r31", + 0x80184eb8: "bl ->0x8018FCBC", + 0x80184ebc: "mr r5, r3", + 0x80184ec0: "addi r3, sp, 32", + 0x80184ec4: "addi r4, r31, 92", + 0x80184ec8: "bl ->0x800E0168", + 0x80184ecc: "lfs f1, 0x0020 (sp)", + 0x80184ed0: "lfs f2, 0x0028 (sp)", + 0x80184ed4: "bl ->0x800CE2D8", + 0x80184ed8: "frsp f1,f1", + 0x80184edc: "lfs f0, -0x5F00 (rtoc)", + 0x80184ee0: "lfd f2, -0x5EB0 (rtoc)", + 0x80184ee4: "fsubs f0,f1,f0", + 0x80184ee8: "fadd f1,f2,f0", + 0x80184eec: "bl ->0x800CE318", + 0x80184ef0: "frsp f31,f1", + 0x80184ef4: "lfd f0, -0x5EF8 (rtoc)", + 0x80184ef8: "fcmpo cr0,f31,f0", + 0x80184efc: "ble- ->0x80184F10", + 0x80184f00: "lfd f0, -0x5EB0 (rtoc)", + 0x80184f04: "fsub f31,f31,f0", + 0x80184f08: "frsp f31,f31", + 0x80184f0c: "b ->0x80184F28", + 0x80184f10: "lfd f0, -0x5E80 (rtoc)", + 0x80184f14: "fcmpo cr0,f31,f0", + 0x80184f18: "bge- ->0x80184F28", + 0x80184f1c: "lfd f0, -0x5EB0 (rtoc)", + 0x80184f20: "fadd f31,f0,f31", + 0x80184f24: "frsp f31,f31", + 0x80184f28: "lwz r28, 0x002C (r31)", + 0x80184f2c: "li r30, 0", + 0x80184f30: "lwz r29, 0x0028 (r31)", + 0x80184f34: "b ->0x80184F70", + 0x80184f38: "mr r3, r30", + 0x80184f3c: "bl ->0x8018FD88", + 0x80184f40: "lbz r0, 0 (r3)", + 0x80184f44: "cmplwi r0, 0", + 0x80184f48: "beq- ->0x80184F6C", + 0x80184f4c: "lwz r0, 0x0028 (r3)", + 0x80184f50: "cmplw r0, r29", + 0x80184f54: "bne- ->0x80184F6C", + 0x80184f58: "lwz r0, 0x002C (r3)", + 0x80184f5c: "cmplw r0, r28", + 0x80184f60: "bne- ->0x80184F6C", + 0x80184f64: "lwz r28, 0x0004 (r3)", + 0x80184f68: "b ->0x80184FDC", + 0x80184f6c: "addi r30, r30, 1", + 0x80184f70: "bl ->0x8018FDB4", + 0x80184f74: "cmpw r30, r3", + 0x80184f78: "blt+ ->0x80184F38", + 0x80184f7c: "li r27, 0", + 0x80184f80: "b ->0x80184FCC", + 0x80184f84: "mr r3, r27", + 0x80184f88: "bl ->0x8018FD88", + 0x80184f8c: "mr r30, r3", + 0x80184f90: "lbz r0, 0 (r3)", + 0x80184f94: "cmplwi r0, 0", + 0x80184f98: "beq- ->0x80184FC8", + 0x80184f9c: "lwz r0, 0x002C (r30)", + 0x80184fa0: "cmplw r0, r28", + 0x80184fa4: "bne- ->0x80184FC8", + 0x80184fa8: "lis r3, 0x8027", + 0x80184fac: "mr r4, r29", + 0x80184fb0: "addi r3, r3, 16344", + 0x80184fb4: "mr r5, r28", + 0x80184fb8: "crclr 6, 6", + 0x80184fbc: "bl ->0x800DD970", + 0x80184fc0: "lwz r28, 0x0004 (r30)", + 0x80184fc4: "b ->0x80184FDC", + 0x80184fc8: "addi r27, r27, 1", + 0x80184fcc: "bl ->0x8018FDB4", + 0x80184fd0: "cmpw r27, r3", + 0x80184fd4: "blt+ ->0x80184F84", + 0x80184fd8: "li r28, 0", + 0x80184fdc: "li r29, 0", + 0x80184fe0: "b ->0x80185010", + 0x80184fe4: "mr r3, r29", + 0x80184fe8: "bl ->0x8018FD88", + 0x80184fec: "lbz r0, 0 (r3)", + 0x80184ff0: "cmplwi r0, 0", + 0x80184ff4: "beq- ->0x8018500C", + 0x80184ff8: "lwz r0, 0x0004 (r3)", + 0x80184ffc: "cmplw r0, r28", + 0x80185000: "bne- ->0x8018500C", + 0x80185004: "mr r28, r3", + 0x80185008: "b ->0x80185020", + 0x8018500c: "addi r29, r29, 1", + 0x80185010: "bl ->0x8018FDB4", + 0x80185014: "cmpw r29, r3", + 0x80185018: "blt+ ->0x80184FE4", + 0x8018501c: "li r28, 0", + 0x80185020: "cmplwi r28, 0", + 0x80185024: "beq- ->0x80185080", + 0x80185028: "mr r3, r28", + 0x8018502c: "addi r4, sp, 20", + 0x80185030: "bl ->0x8018FC2C", + 0x80185034: "lfs f3, -0x5EE0 (rtoc)", + 0x80185038: "lis r3, 0x4330", + 0x8018503c: "lfs f0, 0x0018 (sp)", + 0x80185040: "li r0, 1", + 0x80185044: "stw r3, 0x0038 (sp)", + 0x80185048: "fdivs f1,f0,f3", + 0x8018504c: "lfd f2, -0x5ED8 (rtoc)", + 0x80185050: "stb r0, 0x0022 (r28)", + 0x80185054: "lfs f0, -0x5F04 (rtoc)", + 0x80185058: "fctiwz f1,f1", + 0x8018505c: "stfd f1, 0x0040 (sp)", + 0x80185060: "lwz r0, 0x0044 (sp)", + 0x80185064: "xoris r0, r0, 0x8000", + 0x80185068: "stw r0, 0x003C (sp)", + 0x8018506c: "lfd f1, 0x0038 (sp)", + 0x80185070: "fsubs f1,f1,f2", + 0x80185074: "fmadds f1,f3,f1,f31", + 0x80185078: "stfs f1, 0x0040 (r28)", + 0x8018507c: "end", 0x800e019c: "stwu sp, -0x0010 (sp)", 0x800e01a0: "mflr r0", @@ -33,6 +148,10 @@ 0x800e01b4: "mr r5, r6", 0x800e01b8: "mr r4, r0", 0x800e01bc: "bl ->0x800A3A78", + 0x800e01c0: "lwz r0, 0x0014 (sp)", + 0x800e01c4: "mtlr r0", + 0x800e01c8: "addi sp, sp, 16", + 0x800e01cc: "blr ", 0x800a3a78: "psq_l p2, 0(r3) 0", 0x800a3a7c: "psq_l p4, 0(r4) 0", @@ -42,7 +161,7 @@ 0x800a3a8c: "psq_l p5, 8(r4) 1", 0x800a3a90: "ps_add p7, p3+p5", 0x800a3a94: "psq_st 8(r5), p7", - 0x800a3a98: "end", + 0x800a3a98: "blr ", 0x800ce148: "stwu sp, -0x0020 (sp)", 0x800ce14c: "mflr r0", @@ -345,10 +464,10 @@ 0x800cc510: "bge- ->0x800CC648", 0x800cc514: "lfd f0, 0 (r30)", 0x800cc518: "neg r3, r3", - 0x800cc51c: "fneg f0,f1", + 0x800cc51c: "fneg f0,f0", 0x800cc520: "stfd f0, 0 (r30)", 0x800cc524: "lfd f0, 0x0008 (r30)", - 0x800cc528: "fneg f0,f1", + 0x800cc528: "fneg f0,f0", 0x800cc52c: "stfd f0, 0x0008 (r30)", 0x800cc530: "b ->0x800CC648", 0x800cc534: "b ->0x800CC648", @@ -415,10 +534,10 @@ 0x800cc628: "bge- ->0x800CC648", 0x800cc62c: "lfd f0, 0 (r30)", 0x800cc630: "neg r3, r3", - 0x800cc634: "fneg f0,f1", + 0x800cc634: "fneg f0,f999", 0x800cc638: "stfd f0, 0 (r30)", 0x800cc63c: "lfd f0, 0x0008 (r30)", - 0x800cc640: "fneg f0,f1", + 0x800cc640: "fneg f0,f999", 0x800cc644: "stfd f0, 0x0008 (r30)", 0x800cc648: "lwz r0, 0x0064 (sp)", 0x800cc64c: "lwz r31, 0x005C (sp)", @@ -489,260 +608,6 @@ 0x800cc74c: "addi sp, sp, 32", 0x800cc750: "blr ", - # Walk speed: - - 0x80184d98: "lis r4, 0x8027", - 0x80184d9c: "mr r31, r3", - 0x80184da0: "addi r5, r4, 16320", - 0x80184da4: "lwz r4, 0 (r5)", - 0x80184da8: "lwz r3, 0x0004 (r5)", - 0x80184dac: "lwz r0, 0x0008 (r5)", - 0x80184db0: "stw r4, 0x002C (sp)", - 0x80184db4: "stw r3, 0x0030 (sp)", - 0x80184db8: "stw r0, 0x0034 (sp)", - 0x80184dbc: "lbz r0, 0x0055 (r31)", - 0x80184dc0: "cmpwi r0, 1", - 0x80184dc4: "beq- ->0x80184E60", - 0x80184dc8: "bge- ->0x80184DD8", - 0x80184dcc: "cmpwi r0, 0", - 0x80184dd0: "bge- ->0x80184DE4", - 0x80184dd4: "b ->0x80185230", - 0x80184dd8: "cmpwi r0, 3", - 0x80184ddc: "bge- ->0x80185230", - 0x80184de0: "b ->0x80185088", - 0x80184de4: "lfs f1, 0x0084 (r31)", - 0x80184de8: "lfs f0, -0x5F00 (rtoc)", - 0x80184dec: "fcmpo cr0,f1,f0", - 0x80184df0: "ble- ->0x80184E58", - 0x80184df4: "bl ->0x800D37CC", - 0x80184df8: "xoris r3, r3, 0x8000", - 0x80184dfc: "lis r0, 0x4330", - 0x80184e00: "stw r3, 0x003C (sp)", - 0x80184e04: "lfd f1, -0x5ED8 (rtoc)", - 0x80184e08: "stw r0, 0x0038 (sp)", - 0x80184e0c: "lfd f0, 0x0038 (sp)", - 0x80184e10: "fsubs f31,f0,f1", - 0x80184e14: "bl ->0x800D3088", - 0x80184e18: "lis r0, 0x4330", - 0x80184e1c: "stw r3, 0x0044 (sp)", - 0x80184e20: "lfd f3, -0x5ED0 (rtoc)", - 0x80184e24: "stw r0, 0x0040 (sp)", - 0x80184e28: "lfs f1, 0x0084 (r31)", - 0x80184e2c: "lfd f2, 0x0040 (sp)", - 0x80184e30: "lfs f0, -0x5F00 (rtoc)", - 0x80184e34: "fsubs f2,f2,f3", - 0x80184e38: "fdivs f2,f2,f31", - 0x80184e3c: "fsubs f1,f1,f2", - 0x80184e40: "stfs f1, 0x0084 (r31)", - 0x80184e44: "lfs f1, 0x0084 (r31)", - 0x80184e48: "fcmpo cr0,f1,f0", - 0x80184e4c: "bge- ->0x80185230", - 0x80184e50: "stfs f0, 0x0084 (r31)", - 0x80184e54: "b ->0x80185230", - 0x80184e58: "li r0, 1", - 0x80184e5c: "stb r0, 0x0055 (r31)", - 0x80184e60: "bl ->0x800E0BE4", - 0x80184e64: "lfs f2, -0x5EDC (rtoc)", - 0x80184e68: "lfs f0, -0x5E88 (rtoc)", - 0x80184e6c: "fmuls f1,f2,f1", - 0x80184e70: "fmuls f31,f0,f1", - 0x80184e74: "fmr f1, f31", - 0x80184e78: "bl ->0x800CE148", - 0x80184e7c: "lfs f0, 0x0080 (r31)", - 0x80184e80: "fmul f0,f0,f1", - 0x80184e84: "fmr f1, f31", - 0x80184e88: "frsp f0,f0", - 0x80184e8c: "stfs f0, 0x002C (sp)", - 0x80184e90: "bl ->0x800CDBE0", - 0x80184e94: "lfs f0, 0x0080 (r31)", - 0x80184e98: "addi r3, r31, 92", - 0x80184e9c: "addi r4, r31, 116", - 0x80184ea0: "addi r5, sp, 44", - 0x80184ea4: "fmul f0,f0,f1", - 0x80184ea8: "frsp f0,f0", - 0x80184eac: "stfs f0, 0x0034 (sp)", - 0x80184eb0: "bl ->0x800E019C", - 0x80184eb4: "mr r3, r31", - 0x80184eb8: "bl ->0x8018FCBC", - 0x80184ebc: "mr r5, r3", - 0x80184ec0: "addi r3, sp, 32", - 0x80184ec4: "addi r4, r31, 92", - 0x80184ec8: "bl ->0x800E0168", - 0x80184ecc: "lfs f1, 0x0020 (sp)", - 0x80184ed0: "lfs f2, 0x0028 (sp)", - 0x80184ed4: "bl ->0x800CE2D8", - 0x80184ed8: "frsp f1,f1", - 0x80184edc: "lfs f0, -0x5F00 (rtoc)", - 0x80184ee0: "lfd f2, -0x5EB0 (rtoc)", - 0x80184ee4: "fsubs f0,f1,f0", - 0x80184ee8: "fadd f1,f2,f0", - 0x80184eec: "bl ->0x800CE318", - 0x80184ef0: "frsp f31,f1", - 0x80184ef4: "lfd f0, -0x5EF8 (rtoc)", - 0x80184ef8: "fcmpo cr0,f31,f0", - 0x80184efc: "ble- ->0x80184F10", - 0x80184f00: "lfd f0, -0x5EB0 (rtoc)", - 0x80184f04: "fsub f31,f31,f0", - 0x80184f08: "frsp f31,f31", - 0x80184f0c: "b ->0x80184F28", - 0x80184f10: "lfd f0, -0x5E80 (rtoc)", - 0x80184f14: "fcmpo cr0,f31,f0", - 0x80184f18: "bge- ->0x80184F28", - 0x80184f1c: "lfd f0, -0x5EB0 (rtoc)", - 0x80184f20: "fadd f31,f0,f31", - 0x80184f24: "frsp f31,f31", - 0x80184f28: "lwz r28, 0x002C (r31)", - 0x80184f2c: "li r30, 0", - 0x80184f30: "lwz r29, 0x0028 (r31)", - 0x80184f34: "b ->0x80184F70", - 0x80184f38: "mr r3, r30", - 0x80184f3c: "bl ->0x8018FD88", - 0x80184f40: "lbz r0, 0 (r3)", - 0x80184f44: "cmplwi r0, 0", - 0x80184f48: "beq- ->0x80184F6C", - 0x80184f4c: "lwz r0, 0x0028 (r3)", - 0x80184f50: "cmplw r0, r29", - 0x80184f54: "bne- ->0x80184F6C", - 0x80184f58: "lwz r0, 0x002C (r3)", - 0x80184f5c: "cmplw r0, r28", - 0x80184f60: "bne- ->0x80184F6C", - 0x80184f64: "lwz r28, 0x0004 (r3)", - 0x80184f68: "b ->0x80184FDC", - 0x80184f6c: "addi r30, r30, 1", - 0x80184f70: "bl ->0x8018FDB4", - 0x80184f74: "cmpw r30, r3", - 0x80184f78: "blt+ ->0x80184F38", - 0x80184f7c: "li r27, 0", - 0x80184f80: "b ->0x80184FCC", - 0x80184f84: "mr r3, r27", - 0x80184f88: "bl ->0x8018FD88", - 0x80184f8c: "mr r30, r3", - 0x80184f90: "lbz r0, 0 (r3)", - 0x80184f94: "cmplwi r0, 0", - 0x80184f98: "beq- ->0x80184FC8", - 0x80184f9c: "lwz r0, 0x002C (r30)", - 0x80184fa0: "cmplw r0, r28", - 0x80184fa4: "bne- ->0x80184FC8", - 0x80184fa8: "lis r3, 0x8027", - 0x80184fac: "mr r4, r29", - 0x80184fb0: "addi r3, r3, 16344", - 0x80184fb4: "mr r5, r28", - 0x80184fb8: "crclr 6, 6", - 0x80184fbc: "bl ->0x800DD970", - 0x80184fc0: "lwz r28, 0x0004 (r30)", - 0x80184fc4: "b ->0x80184FDC", - 0x80184fc8: "addi r27, r27, 1", - 0x80184fcc: "bl ->0x8018FDB4", - 0x80184fd0: "cmpw r27, r3", - 0x80184fd4: "blt+ ->0x80184F84", - 0x80184fd8: "li r28, 0", - 0x80184fdc: "li r29, 0", - 0x80184fe0: "b ->0x80185010", - 0x80184fe4: "mr r3, r29", - 0x80184fe8: "bl ->0x8018FD88", - 0x80184fec: "lbz r0, 0 (r3)", - 0x80184ff0: "cmplwi r0, 0", - 0x80184ff4: "beq- ->0x8018500C", - 0x80184ff8: "lwz r0, 0x0004 (r3)", - 0x80184ffc: "cmplw r0, r28", - 0x80185000: "bne- ->0x8018500C", - 0x80185004: "mr r28, r3", - 0x80185008: "b ->0x80185020", - 0x8018500c: "addi r29, r29, 1", - 0x80185010: "bl ->0x8018FDB4", - 0x80185014: "cmpw r29, r3", - 0x80185018: "blt+ ->0x80184FE4", - 0x8018501c: "li r28, 0", - 0x80185020: "cmplwi r28, 0", - 0x80185024: "beq- ->0x80185080", - 0x80185028: "mr r3, r28", - 0x8018502c: "addi r4, sp, 20", - 0x80185030: "bl ->0x8018FC2C", - 0x80185034: "lfs f3, -0x5EE0 (rtoc)", - 0x80185038: "lis r3, 0x4330", - 0x8018503c: "lfs f0, 0x0018 (sp)", - 0x80185040: "li r0, 1", - 0x80185044: "stw r3, 0x0038 (sp)", - 0x80185048: "fdivs f1,f0,f3", - 0x8018504c: "lfd f2, -0x5ED8 (rtoc)", - 0x80185050: "stb r0, 0x0022 (r28)", - 0x80185054: "lfs f0, -0x5F04 (rtoc)", - 0x80185058: "fctiwz f1,f1", - 0x8018505c: "stfd f1, 0x0040 (sp)", - 0x80185060: "lwz r0, 0x0044 (sp)", - 0x80185064: "xoris r0, r0, 0x8000", - 0x80185068: "stw r0, 0x003C (sp)", - 0x8018506c: "lfd f1, 0x0038 (sp)", - 0x80185070: "fsubs f1,f1,f2", - 0x80185074: "fmadds f1,f3,f1,f31", - 0x80185078: "stfs f1, 0x0040 (r28)", - 0x8018507c: "end", - - 0x80185088: "mr r3, r31", - 0x8018508c: "bl ->0x80185AAC", - 0x80185090: "cmpwi r3, 2", - 0x80185094: "bne- ->0x8018520C", - # Todo... - - - 0x80185aac: "stwu sp, -0x0030 (sp)", - 0x80185ab0: "mflr r0", - 0x80185ab4: "stw r0, 0x0034 (sp)", - 0x80185ab8: "stfd f31, 0x0020 (sp)", - 0x80185abc: "psq_st 40(sp), p31", - 0x80185ac0: "stw r31, 0x001C (sp)", - 0x80185ac4: "stw r30, 0x0018 (sp)", - 0x80185ac8: "mr r30, r3", - 0x80185acc: "bl ->0x8018FCBC", - 0x80185ad0: "mr r5, r3", - 0x80185ad4: "addi r3, sp, 8", - 0x80185ad8: "addi r4, r30, 92", - 0x80185adc: "bl ->0x800E0168", - 0x80185ae0: "addi r3, sp, 8", - 0x80185ae4: "bl ->0x800E008C", - 0x80185ae8: "fmr f31, f1", - 0x80185aec: "lwz r3, 0x0028 (r30)", - 0x80185af0: "lwz r4, 0x002C (r30)", - 0x80185af4: "lfs f1, 0x0058 (r30)", - 0x80185af8: "bl ->0x80188214", - 0x80185afc: "rlwinm. r0, r3, 0, 24, 31 (000000ff)", - 0x80185b00: "bne- ->0x80185B0C", - 0x80185b04: "li r3, 2", - 0x80185b08: "b ->0x80185B70", - 0x80185b0c: "mr r3, r30", - 0x80185b10: "bl ->0x8018FCBC", - 0x80185b14: "mr r5, r3", - 0x80185b18: "addi r3, sp, 8", - 0x80185b1c: "addi r4, r30, 92", - 0x80185b20: "bl ->0x800E0168", - 0x80185b24: "addi r3, sp, 8", - 0x80185b28: "bl ->0x800E008C", - 0x80185b2c: "fcmpo cr0,f1,f31", - 0x80185b30: "ble- ->0x80185B6C", - 0x80185b34: "mr r3, r30", - 0x80185b38: "addi r4, r30, 92", - 0x80185b3c: "bl ->0x8018FC74", - 0x80185b40: "mr r3, r30", - 0x80185b44: "bl ->0x8018FC00", - 0x80185b48: "mr r31, r3", - 0x80185b4c: "mr r3, r30", - 0x80185b50: "bl ->0x8018FCBC", - 0x80185b54: "mr r4, r3", - 0x80185b58: "mr r3, r30", - 0x80185b5c: "mr r5, r31", - 0x80185b60: "bl ->0x8018E9B4", - 0x80185b64: "li r3, 1", - 0x80185b68: "b ->0x80185B70", - 0x80185b6c: "li r3, 0", - 0x80185b70: "psq_l p31, 40(sp)", - 0x80185b74: "lwz r0, 0x0034 (sp)", - 0x80185b78: "lfd f31, 0x0020 (sp)", - 0x80185b7c: "lwz r31, 0x001C (sp)", - 0x80185b80: "lwz r30, 0x0018 (sp)", - 0x80185b84: "mtlr r0", - 0x80185b88: "addi sp, sp, 48", - 0x80185b8c: "blr ", - 0x8018fcbc: "stwu sp, -0x0010 (sp)", 0x8018fcc0: "mflr r0", 0x8018fcc4: "stw r0, 0x0014 (sp)", @@ -780,42 +645,553 @@ 0x800a3ab8: "psq_st 8(r5), p7", 0x800a3abc: "blr ", - 0x800e008c: "stwu sp, -0x0010 (sp)", - 0x800e0090: "mflr r0", - 0x800e0094: "stw r0, 0x0014 (sp)", - 0x800e0098: "bl ->0x800A3B38", - 0x800e009c: "lwz r0, 0x0014 (sp)", - 0x800e00a0: "mtlr r0", - 0x800e00a4: "addi sp, sp, 16", - 0x800e00a8: "blr ", + 0x800ce2d8: "stwu sp, -0x0010 (sp)", + 0x800ce2dc: "mflr r0", + 0x800ce2e0: "stw r0, 0x0014 (sp)", + 0x800ce2e4: "bl ->0x800CB024", + 0x800ce2e8: "lwz r0, 0x0014 (sp)", + 0x800ce2ec: "mtlr r0", + 0x800ce2f0: "addi sp, sp, 16", + 0x800ce2f4: "blr ", + + 0x800cb024: "stwu sp, -0x0030 (sp)", + 0x800cb028: "mflr r0", + 0x800cb02c: "lis r3, 0x7FF0", + 0x800cb030: "stfd f2, 0x0010 (sp)", + 0x800cb034: "lwz r8, 0x0014 (sp)", + 0x800cb038: "stw r0, 0x0034 (sp)", + 0x800cb03c: "neg r0, r8", + 0x800cb040: "lwz r4, 0x0010 (sp)", + 0x800cb044: "ior r0, r8, r0", + 0x800cb048: "stfd f1, 0x0008 (sp)", + 0x800cb04c: "rlwinm r6, r4, 0, 1, 31 (7fffffff)", + 0x800cb050: "rlwinm r0, r0, 1, 31, 31 (80000000)", + 0x800cb054: "lwz r5, 0x0008 (sp)", + 0x800cb058: "ior r0, r6, r0", + 0x800cb05c: "stw r31, 0x002C (sp)", + 0x800cb060: "cmplw r0, r3", + 0x800cb064: "lwz r9, 0x000C (sp)", + 0x800cb068: "rlwinm r7, r5, 0, 1, 31 (7fffffff)", + 0x800cb06c: "bgt- ->0x800CB088", + 0x800cb070: "neg r0, r9", + 0x800cb074: "ior r0, r9, r0", + 0x800cb078: "rlwinm r0, r0, 1, 31, 31 (80000000)", + 0x800cb07c: "ior r0, r7, r0", + 0x800cb080: "cmplw r0, r3", + 0x800cb084: "ble- ->0x800CB098", + 0x800cb088: "lfd f1, 0x0010 (sp)", + 0x800cb08c: "lfd f0, 0x0008 (sp)", + 0x800cb090: "fadd f1,f1,f0", + 0x800cb094: "b ->0x800CB2A0", + 0x800cb098: "subis r0, r4, 16368", + 0x800cb09c: "ior. r0, r0, r8", + 0x800cb0a0: "bne- ->0x800CB0AC", + 0x800cb0a4: "bl ->0x800CD85C", + 0x800cb0a8: "b ->0x800CB2A0", + 0x800cb0ac: "ior. r0, r7, r9", + 0x800cb0b0: "rlwinm r0, r4, 2, 30, 30 (80000000)", + 0x800cb0b4: "mr r31, r0", + 0x800cb0b8: "rlwimi r31, r5, 1, 31, 31 (80000000)", + 0x800cb0bc: "bne- ->0x800CB0F8", + 0x800cb0c0: "cmpwi r31, 2", + 0x800cb0c4: "beq- ->0x800CB0E8", + 0x800cb0c8: "bge- ->0x800CB0D8", + 0x800cb0cc: "cmpwi r31, 0", + 0x800cb0d0: "bge- ->0x800CB2A0", + 0x800cb0d4: "b ->0x800CB0F8", + 0x800cb0d8: "cmpwi r31, 4", + 0x800cb0dc: "bge- ->0x800CB0F8", + 0x800cb0e0: "b ->0x800CB0F0", + 0x800cb0e4: "b ->0x800CB2A0", + 0x800cb0e8: "lfd f1, -0x7178 (rtoc)", + 0x800cb0ec: "b ->0x800CB2A0", + 0x800cb0f0: "lfd f1, -0x7170 (rtoc)", + 0x800cb0f4: "b ->0x800CB2A0", + 0x800cb0f8: "ior. r0, r6, r8", + 0x800cb0fc: "bne- ->0x800CB118", + 0x800cb100: "cmpwi r5, 0", + 0x800cb104: "bge- ->0x800CB110", + 0x800cb108: "lfd f1, -0x7168 (rtoc)", + 0x800cb10c: "b ->0x800CB2A0", + 0x800cb110: "lfd f1, -0x7160 (rtoc)", + 0x800cb114: "b ->0x800CB2A0", + 0x800cb118: "subis r0, r6, 32752", + 0x800cb11c: "cmplwi r0, 0", + 0x800cb120: "bne- ->0x800CB1C0", + 0x800cb124: "subis r0, r7, 32752", + 0x800cb128: "cmplwi r0, 0", + 0x800cb12c: "bne- ->0x800CB178", + 0x800cb130: "cmpwi r31, 2", + 0x800cb134: "beq- ->0x800CB168", + 0x800cb138: "bge- ->0x800CB14C", + 0x800cb13c: "cmpwi r31, 0", + 0x800cb140: "beq- ->0x800CB158", + 0x800cb144: "bge- ->0x800CB160", + 0x800cb148: "b ->0x800CB1C0", + 0x800cb14c: "cmpwi r31, 4", + 0x800cb150: "bge- ->0x800CB1C0", + 0x800cb154: "b ->0x800CB170", + 0x800cb158: "lfd f1, -0x7158 (rtoc)", + 0x800cb15c: "b ->0x800CB2A0", + 0x800cb160: "lfd f1, -0x7150 (rtoc)", + 0x800cb164: "b ->0x800CB2A0", + 0x800cb168: "lfd f1, -0x7148 (rtoc)", + 0x800cb16c: "b ->0x800CB2A0", + 0x800cb170: "lfd f1, -0x7140 (rtoc)", + 0x800cb174: "b ->0x800CB2A0", + 0x800cb178: "cmpwi r31, 2", + 0x800cb17c: "beq- ->0x800CB1B0", + 0x800cb180: "bge- ->0x800CB194", + 0x800cb184: "cmpwi r31, 0", + 0x800cb188: "beq- ->0x800CB1A0", + 0x800cb18c: "bge- ->0x800CB1A8", + 0x800cb190: "b ->0x800CB1C0", + 0x800cb194: "cmpwi r31, 4", + 0x800cb198: "bge- ->0x800CB1C0", + 0x800cb19c: "b ->0x800CB1B8", + 0x800cb1a0: "lfd f1, -0x7138 (rtoc)", + 0x800cb1a4: "b ->0x800CB2A0", + 0x800cb1a8: "lfd f1, -0x7130 (rtoc)", + 0x800cb1ac: "b ->0x800CB2A0", + 0x800cb1b0: "lfd f1, -0x7178 (rtoc)", + 0x800cb1b4: "b ->0x800CB2A0", + 0x800cb1b8: "lfd f1, -0x7170 (rtoc)", + 0x800cb1bc: "b ->0x800CB2A0", + 0x800cb1c0: "subis r0, r7, 32752", + 0x800cb1c4: "cmplwi r0, 0", + 0x800cb1c8: "bne- ->0x800CB1E4", + 0x800cb1cc: "cmpwi r5, 0", + 0x800cb1d0: "bge- ->0x800CB1DC", + 0x800cb1d4: "lfd f1, -0x7168 (rtoc)", + 0x800cb1d8: "b ->0x800CB2A0", + 0x800cb1dc: "lfd f1, -0x7160 (rtoc)", + 0x800cb1e0: "b ->0x800CB2A0", + 0x800cb1e4: "sub r0, r7, r6", + 0x800cb1e8: "srawi r0, r0,20", + 0x800cb1ec: "cmpwi r0, 60", + 0x800cb1f0: "ble- ->0x800CB200", + 0x800cb1f4: "lfd f0, -0x7160 (rtoc)", + 0x800cb1f8: "stfd f0, 0x0018 (sp)", + 0x800cb1fc: "b ->0x800CB234", + 0x800cb200: "cmpwi r4, 0", + 0x800cb204: "bge- ->0x800CB21C", + 0x800cb208: "cmpwi r0, -60", + 0x800cb20c: "bge- ->0x800CB21C", + 0x800cb210: "lfd f0, -0x7138 (rtoc)", + 0x800cb214: "stfd f0, 0x0018 (sp)", + 0x800cb218: "b ->0x800CB234", + 0x800cb21c: "lfd f1, 0x0008 (sp)", + 0x800cb220: "lfd f0, 0x0010 (sp)", + 0x800cb224: "fdiv f0,f1,f0", + 0x800cb228: "fabs f1,f0", + 0x800cb22c: "bl ->0x800CD85C", + 0x800cb230: "stfd f1, 0x0018 (sp)", + 0x800cb234: "cmpwi r31, 1", + 0x800cb238: "beq- ->0x800CB260", + 0x800cb23c: "bge- ->0x800CB24C", + 0x800cb240: "cmpwi r31, 0", + 0x800cb244: "bge- ->0x800CB258", + 0x800cb248: "b ->0x800CB28C", + 0x800cb24c: "cmpwi r31, 3", + 0x800cb250: "bge- ->0x800CB28C", + 0x800cb254: "b ->0x800CB274", + 0x800cb258: "lfd f1, 0x0018 (sp)", + 0x800cb25c: "b ->0x800CB2A0", + 0x800cb260: "lwz r0, 0x0018 (sp)", + 0x800cb264: "xoris r0, r0, 0x8000", + 0x800cb268: "stw r0, 0x0018 (sp)", + 0x800cb26c: "lfd f1, 0x0018 (sp)", + 0x800cb270: "b ->0x800CB2A0", + 0x800cb274: "lfd f1, 0x0018 (sp)", + 0x800cb278: "lfd f0, -0x7128 (rtoc)", + 0x800cb27c: "lfd f2, -0x7178 (rtoc)", + 0x800cb280: "fsub f0,f1,f0", + 0x800cb284: "fsub f1,f2,f0", + 0x800cb288: "b ->0x800CB2A0", + 0x800cb28c: "lfd f2, 0x0018 (sp)", + 0x800cb290: "lfd f1, -0x7128 (rtoc)", + 0x800cb294: "lfd f0, -0x7178 (rtoc)", + 0x800cb298: "fsub f1,f2,f1", + 0x800cb29c: "fsub f1,f1,f0", + 0x800cb2a0: "lwz r0, 0x0034 (sp)", + 0x800cb2a4: "lwz r31, 0x002C (sp)", + 0x800cb2a8: "mtlr r0", + 0x800cb2ac: "addi sp, sp, 48", + 0x800cb2b0: "blr ", + + 0x800ce318: "stwu sp, -0x0010 (sp)", + 0x800ce31c: "mflr r0", + 0x800ce320: "stw r0, 0x0014 (sp)", + 0x800ce324: "bl ->0x800CB4D8", + 0x800ce328: "lwz r0, 0x0014 (sp)", + 0x800ce32c: "mtlr r0", + 0x800ce330: "addi sp, sp, 16", + 0x800ce334: "blr ", + + 0x800cb4d8: "stwu sp, -0x0020 (sp)", + 0x800cb4dc: "stfd f2, 0x0010 (sp)", + 0x800cb4e0: "stfd f1, 0x0008 (sp)", + 0x800cb4e4: "lwz r10, 0x0010 (sp)", + 0x800cb4e8: "lwz r6, 0x0008 (sp)", + 0x800cb4ec: "lwz r5, 0x0014 (sp)", + 0x800cb4f0: "rlwinm r8, r10, 0, 1, 31 (7fffffff)", + 0x800cb4f4: "rlwinm r0, r6, 0, 0, 0 (80000000)", + 0x800cb4f8: "lwz r4, 0x000C (sp)", + 0x800cb4fc: "ior. r3, r8, r5", + 0x800cb500: "xor r7, r6, r0", + 0x800cb504: "beq- ->0x800CB52C", + 0x800cb508: "lis r6, 0x7FF0", + 0x800cb50c: "cmpw r7, r6", + 0x800cb510: "bge- ->0x800CB52C", + 0x800cb514: "neg r3, r5", + 0x800cb518: "ior r3, r5, r3", + 0x800cb51c: "rlwinm r3, r3, 1, 31, 31 (80000000)", + 0x800cb520: "ior r3, r8, r3", + 0x800cb524: "cmplw r3, r6", + 0x800cb528: "ble- ->0x800CB540", + 0x800cb52c: "lfd f1, 0x0008 (sp)", + 0x800cb530: "lfd f0, 0x0010 (sp)", + 0x800cb534: "fmul f0,f1,f0", + 0x800cb538: "fdiv f1,f0,f0", + 0x800cb53c: "b ->0x800CB80C", + 0x800cb540: "cmpw r7, r8", + 0x800cb544: "bgt- ->0x800CB574", + 0x800cb548: "blt- ->0x800CB554", + 0x800cb54c: "cmplw r4, r5", + 0x800cb550: "bge- ->0x800CB55C", + 0x800cb554: "lfd f1, 0x0008 (sp)", + 0x800cb558: "b ->0x800CB80C", + 0x800cb55c: "bne- ->0x800CB574", + 0x800cb560: "lis r3, 0x8027", + 0x800cb564: "rlwinm r0, r0, 4, 28, 28 (80000000)", + 0x800cb568: "addi r3, r3, 56", + 0x800cb56c: "lfdx f1,r3,r0", + 0x800cb570: "b ->0x800CB80C", + 0x800cb574: "lis r3, 0x0010", + 0x800cb578: "cmpw r7, r3", + 0x800cb57c: "bge- ->0x800CB5C8", + 0x800cb580: "cmpwi r7, 0", + 0x800cb584: "bne- ->0x800CB5A8", + 0x800cb588: "mr r3, r4", + 0x800cb58c: "li r11, -1043", + 0x800cb590: "b ->0x800CB59C", + 0x800cb594: "rlwinm r3, r3, 1, 0, 30 (7fffffff)", + 0x800cb598: "subi r11, r11, 1", + 0x800cb59c: "cmpwi r3, 0", + 0x800cb5a0: "bgt+ ->0x800CB594", + 0x800cb5a4: "b ->0x800CB5D0", + 0x800cb5a8: "rlwinm r3, r7, 11, 0, 20 (001fffff)", + 0x800cb5ac: "li r11, -1022", + 0x800cb5b0: "b ->0x800CB5BC", + 0x800cb5b4: "rlwinm r3, r3, 1, 0, 30 (7fffffff)", + 0x800cb5b8: "subi r11, r11, 1", + 0x800cb5bc: "cmpwi r3, 0", + 0x800cb5c0: "bgt+ ->0x800CB5B4", + 0x800cb5c4: "b ->0x800CB5D0", + 0x800cb5c8: "srawi r3, r7,20", + 0x800cb5cc: "subi r11, r3, 1023", + 0x800cb5d0: "lis r3, 0x0010", + 0x800cb5d4: "cmpw r8, r3", + 0x800cb5d8: "bge- ->0x800CB624", + 0x800cb5dc: "cmpwi r8, 0", + 0x800cb5e0: "bne- ->0x800CB604", + 0x800cb5e4: "mr r6, r5", + 0x800cb5e8: "li r3, -1043", + 0x800cb5ec: "b ->0x800CB5F8", + 0x800cb5f0: "rlwinm r6, r6, 1, 0, 30 (7fffffff)", + 0x800cb5f4: "subi r3, r3, 1", + 0x800cb5f8: "cmpwi r6, 0", + 0x800cb5fc: "bgt+ ->0x800CB5F0", + 0x800cb600: "b ->0x800CB62C", + 0x800cb604: "rlwinm r6, r8, 11, 0, 20 (001fffff)", + 0x800cb608: "li r3, -1022", + 0x800cb60c: "b ->0x800CB618", + 0x800cb610: "rlwinm r6, r6, 1, 0, 30 (7fffffff)", + 0x800cb614: "subi r3, r3, 1", + 0x800cb618: "cmpwi r6, 0", + 0x800cb61c: "bgt+ ->0x800CB610", + 0x800cb620: "b ->0x800CB62C", + 0x800cb624: "srawi r3, r8,20", + 0x800cb628: "subi r3, r3, 1023", + 0x800cb62c: "cmpwi r11, -1022", + 0x800cb630: "blt- ->0x800CB640", + 0x800cb634: "rlwinm r6, r7, 0, 12, 31 (000fffff)", + 0x800cb638: "oris r9, r6, 0x0010", + 0x800cb63c: "b ->0x800CB670", + 0x800cb640: "subfic r9, r11, -1022", + 0x800cb644: "cmpwi r9, 31", + 0x800cb648: "bgt- ->0x800CB664", + 0x800cb64c: "subfic r6, r9, 32", + 0x800cb650: "slw r7, r7, r9", + 0x800cb654: "srw r6, r4, r6", + 0x800cb658: "slw r4, r4, r9", + 0x800cb65c: "ior r9, r7, r6", + 0x800cb660: "b ->0x800CB670", + 0x800cb664: "subi r6, r9, 32", + 0x800cb668: "slw r9, r4, r6", + 0x800cb66c: "li r4, 0", + 0x800cb670: "cmpwi r3, -1022", + 0x800cb674: "blt- ->0x800CB684", + 0x800cb678: "rlwinm r6, r10, 0, 12, 31 (000fffff)", + 0x800cb67c: "oris r7, r6, 0x0010", + 0x800cb680: "b ->0x800CB6B4", + 0x800cb684: "subfic r10, r3, -1022", + 0x800cb688: "cmpwi r10, 31", + 0x800cb68c: "bgt- ->0x800CB6A8", + 0x800cb690: "subfic r6, r10, 32", + 0x800cb694: "slw r7, r8, r10", + 0x800cb698: "srw r6, r5, r6", + 0x800cb69c: "slw r5, r5, r10", + 0x800cb6a0: "ior r7, r7, r6", + 0x800cb6a4: "b ->0x800CB6B4", + 0x800cb6a8: "subi r6, r10, 32", + 0x800cb6ac: "slw r7, r5, r6", + 0x800cb6b0: "li r5, 0", + 0x800cb6b4: "sub. r6, r11, r3", + 0x800cb6b8: "mtctr r6", + 0x800cb6bc: "beq- ->0x800CB720", + 0x800cb6c0: "cmplw r4, r5", + 0x800cb6c4: "sub r8, r9, r7", + 0x800cb6c8: "sub r10, r4, r5", + 0x800cb6cc: "bge- ->0x800CB6D4", + 0x800cb6d0: "subi r8, r8, 1", + 0x800cb6d4: "cmpwi r8, 0", + 0x800cb6d8: "bge- ->0x800CB6F0", + 0x800cb6dc: "rlwinm r6, r4, 1, 31, 31 (80000000)", + 0x800cb6e0: "add r4, r4, r4", + 0x800cb6e4: "add r6, r9, r6", + 0x800cb6e8: "add r9, r9, r6", + 0x800cb6ec: "b ->0x800CB71C", + 0x800cb6f0: "or. r4, r8, r10", + 0x800cb6f4: "bne- ->0x800CB70C", + 0x800cb6f8: "lis r3, 0x8027", + 0x800cb6fc: "rlwinm r0, r0, 4, 28, 28 (80000000)", + 0x800cb700: "addi r3, r3, 56", + 0x800cb704: "lfdx f1,r3,r0", + 0x800cb708: "b ->0x800CB80C", + 0x800cb70c: "rlwinm r6, r10, 1, 31, 31 (80000000)", + 0x800cb710: "add r4, r10, r10", + 0x800cb714: "add r9, r8, r6", + 0x800cb718: "add r9, r8, r9", + 0x800cb71c: "bdnz+ ->0x800CB6C0", + 0x800cb720: "cmplw r4, r5", + 0x800cb724: "sub r6, r9, r7", + 0x800cb728: "sub r5, r4, r5", + 0x800cb72c: "bge- ->0x800CB734", + 0x800cb730: "subi r6, r6, 1", + 0x800cb734: "cmpwi r6, 0", + 0x800cb738: "blt- ->0x800CB744", + 0x800cb73c: "mr r9, r6", + 0x800cb740: "mr r4, r5", + 0x800cb744: "ior. r5, r9, r4", + 0x800cb748: "bne- ->0x800CB760", + 0x800cb74c: "lis r3, 0x8027", + 0x800cb750: "rlwinm r0, r0, 4, 28, 28 (80000000)", + 0x800cb754: "addi r3, r3, 56", + 0x800cb758: "lfdx f1,r3,r0", + 0x800cb75c: "b ->0x800CB80C", + 0x800cb760: "lis r5, 0x0010", + 0x800cb764: "b ->0x800CB77C", + 0x800cb768: "rlwinm r6, r4, 1, 31, 31 (80000000)", + 0x800cb76c: "add r4, r4, r4", + 0x800cb770: "add r6, r9, r6", + 0x800cb774: "subi r3, r3, 1", + 0x800cb778: "add r9, r9, r6", + 0x800cb77c: "cmpw r9, r5", + 0x800cb780: "blt+ ->0x800CB768", + 0x800cb784: "cmpwi r3, -1022", + 0x800cb788: "blt- ->0x800CB7AC", + 0x800cb78c: "addi r3, r3, 1023", + 0x800cb790: "subis r5, r9, 16", + 0x800cb794: "rlwinm r3, r3, 20, 0, 11 (00000fff)", + 0x800cb798: "stw r4, 0x000C (sp)", + 0x800cb79c: "ior r3, r5, r3", + 0x800cb7a0: "ior r0, r3, r0", + 0x800cb7a4: "stw r0, 0x0008 (sp)", + 0x800cb7a8: "b ->0x800CB808", + 0x800cb7ac: "subfic r6, r3, -1022", + 0x800cb7b0: "cmpwi r6, 20", + 0x800cb7b4: "bgt- ->0x800CB7D0", + 0x800cb7b8: "subfic r3, r6, 32", + 0x800cb7bc: "srw r4, r4, r6", + 0x800cb7c0: "slw r3, r9, r3", + 0x800cb7c4: "sraw r9, r9, r6", + 0x800cb7c8: "ior r3, r4, r3", + 0x800cb7cc: "b ->0x800CB7FC", + 0x800cb7d0: "cmpwi r6, 31", + 0x800cb7d4: "bgt- ->0x800CB7F0", + 0x800cb7d8: "subfic r5, r6, 32", + 0x800cb7dc: "srw r3, r4, r6", + 0x800cb7e0: "slw r4, r9, r5", + 0x800cb7e4: "mr r9, r0", + 0x800cb7e8: "ior r3, r4, r3", + 0x800cb7ec: "b ->0x800CB7FC", + 0x800cb7f0: "subi r3, r6, 32", + 0x800cb7f4: "sraw r3, r9, r3", + 0x800cb7f8: "mr r9, r0", + 0x800cb7fc: "ior r0, r9, r0", + 0x800cb800: "stw r3, 0x000C (sp)", + 0x800cb804: "stw r0, 0x0008 (sp)", + 0x800cb808: "lfd f1, 0x0008 (sp)", + 0x800cb80c: "addi sp, sp, 32", + 0x800cb810: "blr ", - 0x800a3b38: "lfs f4, -0x73E0 (rtoc)", - 0x800a3b3c: "psq_l p0, 0(r3) 0", - 0x800a3b40: "ps_mul p0, p0*p0", - 0x800a3b44: "lfs f1, 0x0008 (r3)", - 0x800a3b48: "fsubs f2,f4,f4", - 0x800a3b4c: "ps_madd p1, p1*p1+p0", - 0x800a3b50: "ps_sum0 p1, 0=p1+p0, 1=p0", - 0x800a3b54: "fcmpu cr0,f1,f2", - 0x800a3b58: "beq- ->0x800A3B78", - 0x800a3b5c: "frsqrte f0,f1", - 0x800a3b60: "lfs f3, -0x73DC (rtoc)", - 0x800a3b64: "fmuls f2,f0,f0", - 0x800a3b68: "fmuls f0,f0,f4", - 0x800a3b6c: "fnmsubs f2,f2,f1,f3", - 0x800a3b70: "fmuls f0,f2,f0", - 0x800a3b74: "fmuls f1,f1,f0", - 0x800a3b78: "blr ", + 0x8018fc2c: "stwu sp, -0x0010 (sp)", + 0x8018fc30: "mflr r0", + 0x8018fc34: "stw r0, 0x0014 (sp)", + 0x8018fc38: "lwz r3, 0x0008 (r3)", + 0x8018fc3c: "bl ->0x800E3D6C", + 0x8018fc40: "lwz r0, 0x0014 (sp)", + 0x8018fc44: "mtlr r0", + 0x8018fc48: "addi sp, sp, 16", + 0x8018fc4c: "blr ", - 0x800e0be4: "stwu sp, -0x0010 (sp)", - 0x800e0be8: "mflr r0", - 0x800e0bec: "stw r0, 0x0014 (sp)", - 0x800e0bf0: "bl ->0x801ADC7C", # wait isn't this prng? - 0x800e0bf4: "lwz r0, 0x0014 (sp)", - 0x800e0bf8: "mtlr r0", - 0x800e0bfc: "addi sp, sp, 16", - 0x800e0c00: "blr ", + 0x800e3d6c: "stwu sp, -0x0010 (sp)", + 0x800e3d70: "mflr r0", + 0x800e3d74: "mr r5, r3", + 0x800e3d78: "mr r3, r4", + 0x800e3d7c: "stw r0, 0x0014 (sp)", + 0x800e3d80: "addi r4, r5, 36", + 0x800e3d84: "bl ->0x800E01D0", + 0x800e3d88: "lwz r0, 0x0014 (sp)", + 0x800e3d8c: "mtlr r0", + 0x800e3d90: "addi sp, sp, 16", + 0x800e3d94: "blr ", + 0x800cd85c: "stwu sp, -0x0010 (sp)", + 0x800cd860: "lis r3, 0x8027", + 0x800cd864: "lis r0, 0x4410", + 0x800cd868: "stfd f1, 0x0008 (sp)", + 0x800cd86c: "addi r5, r3, 696", + 0x800cd870: "lwz r6, 0x0008 (sp)", + 0x800cd874: "rlwinm r4, r6, 0, 1, 31 (7fffffff)", + 0x800cd878: "cmpw r4, r0", + 0x800cd87c: "blt- ->0x800CD8EC", + 0x800cd880: "lis r0, 0x7FF0", + 0x800cd884: "cmpw r4, r0", + 0x800cd888: "bgt- ->0x800CD8A4", + 0x800cd88c: "subis r0, r4, 32752", + 0x800cd890: "cmplwi r0, 0", + 0x800cd894: "bne- ->0x800CD8B0", + 0x800cd898: "lwz r0, 0x000C (sp)", + 0x800cd89c: "cmpwi r0, 0", + 0x800cd8a0: "beq- ->0x800CD8B0", + 0x800cd8a4: "lfd f0, 0x0008 (sp)", + 0x800cd8a8: "fadd f1,f0,f0", + 0x800cd8ac: "b ->0x800CDA6C", + 0x800cd8b0: "cmpwi r6, 0", + 0x800cd8b4: "ble- ->0x800CD8D0", + 0x800cd8b8: "addi r4, r5, 0", + 0x800cd8bc: "addi r3, r5, 32", + 0x800cd8c0: "lfd f1, 0x0018 (r4)", + 0x800cd8c4: "lfd f0, 0x0018 (r3)", + 0x800cd8c8: "fadd f1,f1,f0", + 0x800cd8cc: "b ->0x800CDA6C", + 0x800cd8d0: "addi r4, r5, 0", + 0x800cd8d4: "addi r3, r5, 32", + 0x800cd8d8: "lfd f1, 0x0018 (r4)", + 0x800cd8dc: "lfd f0, 0x0018 (r3)", + 0x800cd8e0: "fneg f1,f999", + 0x800cd8e4: "fsub f1,f1,f0", + 0x800cd8e8: "b ->0x800CDA6C", + 0x800cd8ec: "lis r0, 0x3FDC", + 0x800cd8f0: "cmpw r4, r0", + 0x800cd8f4: "bge- ->0x800CD924", + 0x800cd8f8: "lis r0, 0x3E20", + 0x800cd8fc: "cmpw r4, r0", + 0x800cd900: "bge- ->0x800CD91C", + 0x800cd904: "lfd f2, -0x6DC8 (rtoc)", + 0x800cd908: "lfd f0, -0x6DC0 (rtoc)", + 0x800cd90c: "fadd f2,f2,f1", + 0x800cd910: "fcmpo cr0,f2,f0", + 0x800cd914: "ble- ->0x800CD91C", + 0x800cd918: "b ->0x800CDA6C", + 0x800cd91c: "li r0, -1", + 0x800cd920: "b ->0x800CD9C0", + 0x800cd924: "fabs f3,f1", + 0x800cd928: "lis r0, 0x3FF3", + 0x800cd92c: "cmpw r4, r0", + 0x800cd930: "stfd f3, 0x0008 (sp)", + 0x800cd934: "bge- ->0x800CD980", + 0x800cd938: "lis r0, 0x3FE6", + 0x800cd93c: "cmpw r4, r0", + 0x800cd940: "bge- ->0x800CD964", + 0x800cd944: "lfd f2, -0x6DB8 (rtoc)", + 0x800cd948: "li r0, 0", + 0x800cd94c: "lfd f1, -0x6DC0 (rtoc)", + 0x800cd950: "fadd f0,f2,f3", + 0x800cd954: "fmsub f1,f2,f3,f1", + 0x800cd958: "fdiv f0,f1,f0", + 0x800cd95c: "stfd f0, 0x0008 (sp)", + 0x800cd960: "b ->0x800CD9C0", + 0x800cd964: "lfd f0, -0x6DC0 (rtoc)", + 0x800cd968: "li r0, 1", + 0x800cd96c: "fsub f1,f3,f0", + 0x800cd970: "fadd f0,f0,f3", + 0x800cd974: "fdiv f0,f1,f0", + 0x800cd978: "stfd f0, 0x0008 (sp)", + 0x800cd97c: "b ->0x800CD9C0", + 0x800cd980: "lis r3, 0x4004", + 0x800cd984: "subi r0, r3, 32768", + 0x800cd988: "cmpw r4, r0", + 0x800cd98c: "bge- ->0x800CD9B0", + 0x800cd990: "lfd f2, -0x6DB0 (rtoc)", + 0x800cd994: "li r0, 2", + 0x800cd998: "lfd f0, -0x6DC0 (rtoc)", + 0x800cd99c: "fsub f1,f3,f2", + 0x800cd9a0: "fmadd f0,f2,f3,f0", + 0x800cd9a4: "fdiv f0,f1,f0", + 0x800cd9a8: "stfd f0, 0x0008 (sp)", + 0x800cd9ac: "b ->0x800CD9C0", + 0x800cd9b0: "lfd f0, -0x6DA8 (rtoc)", + 0x800cd9b4: "li r0, 3", + 0x800cd9b8: "fdiv f0,f0,f3", + 0x800cd9bc: "stfd f0, 0x0008 (sp)", + 0x800cd9c0: "lfd f9, 0x0008 (sp)", + 0x800cd9c4: "addi r3, r5, 64", + 0x800cd9c8: "lfd f4, 0x0050 (r3)", + 0x800cd9cc: "cmpwi r0, 0", + 0x800cd9d0: "fmul f11,f9,f9", + 0x800cd9d4: "lfd f1, 0x0040 (r3)", + 0x800cd9d8: "lfd f7, 0x0030 (r3)", + 0x800cd9dc: "lfd f3, 0x0048 (r3)", + 0x800cd9e0: "lfd f0, 0x0038 (r3)", + 0x800cd9e4: "fmul f10,f11,f11", + 0x800cd9e8: "lfd f6, 0x0020 (r3)", + 0x800cd9ec: "lfd f2, 0x0028 (r3)", + 0x800cd9f0: "lfd f5, 0x0010 (r3)", + 0x800cd9f4: "fmadd f8,f10,f4,f1", + 0x800cd9f8: "lfd f1, 0x0018 (r3)", + 0x800cd9fc: "lfd f4, 0x0040 (r5)", + 0x800cda00: "fmadd f3,f10,f3,f0", + 0x800cda04: "lfd f0, 0x0008 (r3)", + 0x800cda08: "fmadd f7,f10,f8,f7", + 0x800cda0c: "fmadd f2,f10,f3,f2", + 0x800cda10: "fmadd f3,f10,f7,f6", + 0x800cda14: "fmadd f1,f10,f2,f1", + 0x800cda18: "fmadd f2,f10,f3,f5", + 0x800cda1c: "fmadd f0,f10,f1,f0", + 0x800cda20: "fmadd f1,f10,f2,f4", + 0x800cda24: "fmul f2,f10,f0", + 0x800cda28: "fmul f0,f11,f1", + 0x800cda2c: "bge- ->0x800CDA3C", + 0x800cda30: "fadd f0,f0,f2", + 0x800cda34: "fnmsub f1,f9,f0,f9", + 0x800cda38: "b ->0x800CDA6C", + 0x800cda3c: "rlwinm r0, r0, 3, 0, 28 (1fffffff)", + 0x800cda40: "addi r3, r5, 32", + 0x800cda44: "fadd f1,f0,f2", + 0x800cda48: "lfdx f0,r3,r0", + 0x800cda4c: "addi r3, r5, 0", + 0x800cda50: "cmpwi r6, 0", + 0x800cda54: "lfdx f2,r3,r0", + 0x800cda58: "fmsub f0,f9,f1,f0", + 0x800cda5c: "fsub f0,f0,f9", + 0x800cda60: "fsub f1,f2,f0", + 0x800cda64: "bge- ->0x800CDA6C", + 0x800cda68: "fneg f1,f999", + 0x800cda6c: "addi sp, sp, 16", + 0x800cda70: "blr ", # Walking: