diff --git a/Makefile b/Makefile index 5175d6e..1da7837 100644 --- a/Makefile +++ b/Makefile @@ -24,7 +24,7 @@ export V BUILD_DIR ?= ./build -all: DAP42.bin KITCHEN42.bin \ +all: DAP42.bin DAP42DC.bin KITCHEN42.bin \ DAP103.bin DAP103-DFU.bin \ DAP103-NUCLEO-STBOOT.bin \ BRAINv3.3.bin \ @@ -44,6 +44,12 @@ DAP42.bin: | $(BUILD_DIR) $(Q)$(MAKE) TARGET=STM32F042 -C src/ $(Q)cp src/DAP42.bin $(BUILD_DIR)/$(@) +DAP42DC.bin: | $(BUILD_DIR) + @printf " BUILD $(@)\n" + $(Q)$(MAKE) TARGET=DAP42DC -C src/ clean + $(Q)$(MAKE) TARGET=DAP42DC -C src/ + $(Q)cp src/DAP42.bin $(BUILD_DIR)/$(@) + KITCHEN42.bin: | $(BUILD_DIR) @printf " BUILD $(@)\n" $(Q)$(MAKE) TARGET=KITCHEN42 -C src/ clean diff --git a/src/stm32f042/dap42dc/DAP/CMSIS_DAP_config.h b/src/stm32f042/dap42dc/DAP/CMSIS_DAP_config.h new file mode 100644 index 0000000..386142b --- /dev/null +++ b/src/stm32f042/dap42dc/DAP/CMSIS_DAP_config.h @@ -0,0 +1,145 @@ +/* + * Copyright (c) 2015, Devan Lai + * + * Permission to use, copy, modify, and/or distribute this software + * for any purpose with or without fee is hereby granted, provided + * that the above copyright notice and this permission notice + * appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL + * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE + * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM + * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + Portions of this file are derived from: + + Dapper Mime - an open-source CMSIS-DAP implementation + HAL for STM32F0xx2 + this file is used by the mbed CMSIS-DAP routines + + Copyright (C) 2014 Peter Lawrence + + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the "Software"), + to deal in the Software without restriction, including without limitation + the rights to use, copy, modify, merge, publish, distribute, sublicense, + and/or sell copies of the Software, and to permit persons to whom the + Software is furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + DEALINGS IN THE SOFTWARE. +*/ + +#ifndef __DAP_CONFIG_H__ +#define __DAP_CONFIG_H__ + +//************************************************************************************************** +/** +\defgroup DAP_Config_Debug_gr CMSIS-DAP Debug Unit Information +\ingroup DAP_ConfigIO_gr +@{ +Provides definitions about: + - Definition of Cortex-M processor parameters used in CMSIS-DAP Debug Unit. + - Debug Unit communication packet size. + - Debug Access Port communication mode (JTAG or SWD). + - Optional information about a connected Target Device (for Evaluation Boards). +*/ + +#include "config.h" + +// Board configuration options + +/// Processor Clock of the Cortex-M MCU used in the Debug Unit. +/// This value is used to calculate the SWD/JTAG clock speed. +#define CPU_CLOCK 48000000 ///< Specifies the CPU Clock in Hz + +/// Number of processor cycles for I/O Port write operations. +/// This value is used to calculate the SWD/JTAG clock speed that is generated with I/O +/// Port write operations in the Debug Unit by a Cortex-M MCU. Most Cortex-M processors +/// requrie 2 processor cycles for a I/O Port Write operation. If the Debug Unit uses +/// a Cortex-M0+ processor with high-speed peripheral I/O only 1 processor cycle might be +/// required. +#define IO_PORT_WRITE_CYCLES 2 ///< I/O Cycles: 2=default, 1=Cortex-M0+ fast I/0 + +/// Indicate that Serial Wire Debug (SWD) communication mode is available at the Debug Access Port. +/// This information is returned by the command \ref DAP_Info as part of Capabilities. +#define DAP_SWD 1 ///< SWD Mode: 1 = available, 0 = not available + +/// Indicate that JTAG communication mode is available at the Debug Port. +/// This information is returned by the command \ref DAP_Info as part of Capabilities. +#if defined(CONF_JTAG) +#define DAP_JTAG 1 ///< JTAG Mode: 1 = available +#else +#define DAP_JTAG 0 ///< JTAG Mode: 0 = not available +#endif + +/// Configure maximum number of JTAG devices on the scan chain connected to the Debug Access Port. +/// This setting impacts the RAM requirements of the Debug Unit. Valid range is 1 .. 255. +#define DAP_JTAG_DEV_CNT 8 ///< Maximum number of JTAG devices on scan chain + +/// Default communication mode on the Debug Access Port. +/// Used for the command \ref DAP_Connect when Port Default mode is selected. +#define DAP_DEFAULT_PORT 1 ///< Default JTAG/SWJ Port Mode: 1 = SWD, 2 = JTAG. + +/// Default communication speed on the Debug Access Port for SWD and JTAG mode. +/// Used to initialize the default SWD/JTAG clock frequency. +/// The command \ref DAP_SWJ_Clock can be used to overwrite this default setting. +#define DAP_DEFAULT_SWJ_CLOCK 10000000 ///< Default SWD/JTAG clock frequency in Hz. + +/// Maximum Package Size for Command and Response data. +/// This configuration settings is used to optimized the communication performance with the +/// debugger and depends on the USB peripheral. Change setting to 1024 for High-Speed USB. +#define DAP_PACKET_SIZE 64 ///< USB: 64 = Full-Speed, 1024 = High-Speed. + +/// Maximum Package Buffers for Command and Response data. +/// This configuration settings is used to optimized the communication performance with the +/// debugger and depends on the USB peripheral. For devices with limited RAM or USB buffer the +/// setting can be reduced (valid range is 1 .. 255). Change setting to 4 for High-Speed USB. +#define DAP_PACKET_COUNT 12 ///< Buffers: 64 = Full-Speed, 4 = High-Speed. + +#define DAP_PACKET_QUEUE_SIZE (DAP_PACKET_COUNT+8) + +/// Debug Unit is connected to fixed Target Device. +/// The Debug Unit may be part of an evaluation board and always connected to a fixed +/// known device. In this case a Device Vendor and Device Name string is stored which +/// may be used by the debugger or IDE to configure device parameters. +#define TARGET_DEVICE_FIXED 0 ///< Target Device: 1 = known, 0 = unknown; + +#if TARGET_DEVICE_FIXED +#define TARGET_DEVICE_VENDOR "" ///< String indicating the Silicon Vendor +#define TARGET_DEVICE_NAME "" ///< String indicating the Target Device +#endif + +///@} + +#define SWCLK_GPIO_PORT GPIOA +#define SWCLK_GPIO_PIN GPIO1 +#define SWDIO_GPIO_PORT GPIOA +#define SWDIO_GPIO_PIN GPIO0 +#define nRESET_GPIO_PORT GPIOA +#define nRESET_GPIO_PIN GPIO4 + +#define LED_CON_GPIO_PORT GPIOA +#define LED_CON_GPIO_PIN GPIO5 +#define LED_RUN_GPIO_PORT GPIOA +#define LED_RUN_GPIO_PIN GPIO6 +#define LED_ACT_GPIO_PORT GPIOA +#define LED_ACT_GPIO_PIN GPIO7 + +#define SWDIO_GPIO_PIN_NUM 0 + +#endif diff --git a/src/stm32f042/dap42dc/config.h b/src/stm32f042/dap42dc/config.h new file mode 100644 index 0000000..8089a7d --- /dev/null +++ b/src/stm32f042/dap42dc/config.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2016, Devan Lai + * + * Permission to use, copy, modify, and/or distribute this software + * for any purpose with or without fee is hereby granted, provided + * that the above copyright notice and this permission notice + * appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL + * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE + * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM + * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef CONFIG_H_INCLUDED +#define CONFIG_H_INCLUDED + +#define PRODUCT_NAME "DAP42dc" +#define REMAP_USB 1 + +#define CAN_RX_AVAILABLE 1 +#define CAN_TX_AVAILABLE 0 +#define CAN_NVIC_LINE NVIC_CEC_CAN_IRQ + +#define VCDC_AVAILABLE 0 +#define VCDC_TX_BUFFER_SIZE 256 +#define VCDC_RX_BUFFER_SIZE 256 + +#define CDC_AVAILABLE 1 +#define DEFAULT_BAUDRATE 115200 + +#define CONSOLE_USART USART2 +#define CONSOLE_TX_BUFFER_SIZE 128 +#define CONSOLE_RX_BUFFER_SIZE 1024 + +#define CONSOLE_USART_GPIO_PORT GPIOA +#define CONSOLE_USART_GPIO_PINS (GPIO2|GPIO3) +#define CONSOLE_USART_GPIO_AF GPIO_AF1 +#define CONSOLE_USART_MODE USART_MODE_TX_RX +#define CONSOLE_USART_CLOCK RCC_USART2 + +#define CONSOLE_USART_IRQ_NAME usart2_isr +#define CONSOLE_USART_NVIC_LINE NVIC_USART2_IRQ +#define CONSOLE_RX_DMA_CONTROLLER DMA1 +#define CONSOLE_RX_DMA_CLOCK RCC_DMA +#define CONSOLE_RX_DMA_CHANNEL DMA_CHANNEL5 + +#define DFU_AVAILABLE 1 +#define nBOOT0_GPIO_CLOCK RCC_GPIOB +#define nBOOT0_GPIO_PORT GPIOB +#define nBOOT0_GPIO_PIN GPIO8 + +/* Word size for usart_recv and usart_send */ +typedef uint8_t usart_word_t; + +#define LED_OPEN_DRAIN 1 + +#endif diff --git a/src/stm32f042/dap42dc/target.c b/src/stm32f042/dap42dc/target.c new file mode 100644 index 0000000..ce414c1 --- /dev/null +++ b/src/stm32f042/dap42dc/target.c @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2016, Devan Lai + * + * Permission to use, copy, modify, and/or distribute this software + * for any purpose with or without fee is hereby granted, provided + * that the above copyright notice and this permission notice + * appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL + * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE + * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM + * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, + * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include + +#include "target.h" +#include "config.h" + +/* Reconfigure processor settings */ +void cpu_setup(void) { + +} + +/* Set STM32 to 48 MHz. */ +void clock_setup(void) { + rcc_clock_setup_in_hsi48_out_48mhz(); + + // Trim from USB sync frame + crs_autotrim_usb_enable(); + rcc_set_usbclk_source(RCC_HSI48); +} + +static void button_setup(void) { + /* Enable GPIOB clock. */ + rcc_periph_clock_enable(RCC_GPIOB); + + /* Set PB8 to an input */ + gpio_mode_setup(GPIOB, GPIO_MODE_INPUT, GPIO_PUPD_NONE, GPIO8); +} + +void gpio_setup(void) { + /* + LED0 (R), 1 (G), 2 (B) on PA5, PA6, PA7, open drain + TX, RX (MCU-side) on PA2, PA3 + TGT_RST on PA4 + TGT_SWDIO, TGT_SWCLK on PA0, PA1 + */ + + /* Enable GPIOA and GPIOB clocks. */ + rcc_periph_clock_enable(RCC_GPIOA); + + /* Setup LEDs as open-drain outputs */ + gpio_set_output_options(GPIOA, GPIO_OTYPE_OD, GPIO_OSPEED_LOW, + GPIO5 | GPIO6 | GPIO7); + + gpio_mode_setup(GPIOA, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, + GPIO5 | GPIO6 | GPIO7); + button_setup(); +} + +void target_console_init(void) { + /* Enable UART clock */ + rcc_periph_clock_enable(CONSOLE_USART_CLOCK); + + /* Setup GPIO pins for UART2 */ + gpio_mode_setup(CONSOLE_USART_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, CONSOLE_USART_GPIO_PINS); + gpio_set_af(CONSOLE_USART_GPIO_PORT, CONSOLE_USART_GPIO_AF, CONSOLE_USART_GPIO_PINS); +} + +void led_bit(uint8_t position, bool state) { + uint32_t gpio = 0xFFFFFFFFU; + if (position == 0) { + gpio = GPIO5; + } else if (position == 1) { + gpio = GPIO6; + } else if (position == 2) { + gpio = GPIO7; + } + + if (gpio != 0xFFFFFFFFU) { + if (state) { + gpio_clear(GPIOA, gpio); + } else { + gpio_set(GPIOA, gpio); + } + } +} + +void led_num(uint8_t value) { + if (value & 0x4) { + gpio_clear(GPIOA, GPIO5); + } else { + gpio_set(GPIOA, GPIO5); + } + if (value & 0x2) { + gpio_clear(GPIOA, GPIO6); + } else { + gpio_set(GPIOA, GPIO6); + } + if (value & 0x1) { + gpio_clear(GPIOA, GPIO7); + } else { + gpio_set(GPIOA, GPIO7); + } +} diff --git a/src/targets.mk b/src/targets.mk index 69cb399..cbb2146 100644 --- a/src/targets.mk +++ b/src/targets.mk @@ -44,6 +44,12 @@ ifeq ($(TARGET),DAP42K6U) LDSCRIPT ?= ./stm32f042/stm32f042x6.ld ARCH = STM32F0 endif +ifeq ($(TARGET),DAP42DC) + TARGET_COMMON_DIR := ./stm32f042 + TARGET_SPEC_DIR := ./stm32f042/dap42dc + LDSCRIPT ?= ./stm32f042/stm32f042x6.ld + ARCH = STM32F0 +endif ifeq ($(TARGET),STM32F103) TARGET_COMMON_DIR := ./stm32f103 TARGET_SPEC_DIR := ./stm32f103/stlinkv2-dongle