Synthesize SKT as a hardware-accelerated streaming QDMA kernel for the parallel computation of the HLL, CountMin and FastAGMS sketches.
- Setup the environment importing XRT setup and Vitis settings:
. /opt/xilinx/xrt/setup.sh
. /opt/Xilinx/Vitis/2020.1/settings64.sh
- Build the kernel archive
bin/skt_stream.xclbin
(expect 1-2 hours):
make hw
- Build the example host application
bin/skt_stream
:
make host
Run the sketch over a generated input of sequential 32-bit integers: 0, 1, 2, 3, ...
bin/skt_stream bin/skt_stream.xclbin 10000000
A sketch summary is printed to the console.
The complete result record is left in the a.sketch
output file for later offline querying.
Run the sketch over a (prefix of a) user-supplied file of 32-bit binary data:
bin/skt_stream bin/skt_stream.xclbin 10000000 file.dat
- Main Kernel Entry
- Core Sketch Functions:
- Data Handling