From 55f7491ddec7e65f6dfc50dcb8f6529719d7a057 Mon Sep 17 00:00:00 2001 From: Alexey Bataev Date: Sat, 18 Jan 2025 08:12:42 -0800 Subject: [PATCH] [SLP][NFC]Add a test with incomplete insertion mask, NFC --- .../SLPVectorizer/X86/insert-subvector.ll | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll diff --git a/llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll b/llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll new file mode 100644 index 000000000000..9ead8756f999 --- /dev/null +++ b/llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll @@ -0,0 +1,40 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 +; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake-avx512 | FileCheck %s + +define <8 x float> @test(ptr %x, float %v, float %a) { +; CHECK-LABEL: define <8 x float> @test( +; CHECK-SAME: ptr [[X:%.*]], float [[V:%.*]], float [[A:%.*]]) #[[ATTR0:[0-9]+]] { +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> poison, float [[A]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[V]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP8:%.*]] = fadd <4 x float> [[TMP3]], [[TMP7]] +; CHECK-NEXT: [[TMP6:%.*]] = load <2 x float>, ptr [[X]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = call <4 x float> @llvm.vector.insert.v4f32.v2f32(<4 x float> [[TMP7]], <2 x float> [[TMP6]], i64 0) +; CHECK-NEXT: [[TMP12:%.*]] = fadd <4 x float> [[TMP3]], [[TMP11]] +; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> undef, <8 x i32> +; CHECK-NEXT: [[TMP10:%.*]] = shufflevector <4 x float> [[TMP12]], <4 x float> poison, <8 x i32> +; CHECK-NEXT: [[I71:%.*]] = shufflevector <8 x float> [[TMP9]], <8 x float> [[TMP10]], <8 x i32> +; CHECK-NEXT: ret <8 x float> [[I71]] +; + %gep1 = getelementptr inbounds <4 x float>, ptr %x, i64 0, i64 1 + %x0 = load float, ptr %x, align 4 + %x1 = load float, ptr %gep1, align 4 + %add1 = fadd float %a, %v + %add2 = fadd float %a, %v + %add3 = fadd float %a, %v + %add4 = fadd float %a, %v + %add5 = fadd float %a, %x0 + %add6 = fadd float %a, %x1 + %add7 = fadd float %a, %v + %add8 = fadd float %a, %v + %i0 = insertelement <8 x float> undef, float %add1, i32 0 + %i1 = insertelement <8 x float> %i0, float %add2, i32 1 + %i2 = insertelement <8 x float> %i1, float %add3, i32 2 + %i3 = insertelement <8 x float> %i2, float %add4, i32 3 + %i4 = insertelement <8 x float> %i3, float %add5, i32 0 + %i5 = insertelement <8 x float> %i4, float %add6, i32 1 + %i6 = insertelement <8 x float> %i5, float %add7, i32 2 + %i7 = insertelement <8 x float> %i6, float %add8, i32 3 + ret <8 x float> %i7 +}