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Thank you for sharing this design.
Looking at Q1(DMP2066LSN), SD_PWR_ON is active high.
It looks like this signal(and the R6 pullup) at the gate will turn off the Q1 P-channel mosfet. is this right?
The text was updated successfully, but these errors were encountered:
Thank you for sharing this design.
Looking at Q1(DMP2066LSN), SD_PWR_ON is active high.
It looks like this signal(and the R6 pullup) at the gate will turn off the Q1 P-channel mosfet. is this right?
The text was updated successfully, but these errors were encountered: