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spc700a.s
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@ notaz's SPC700 Emulator v0.11 - Assembler Output
@ (c) Copyright 2006 notaz, All rights reserved.
@ this is a rewrite of spc700.cpp in ARM asm, inspired by other asm CPU cores like
@ Cyclone and DrZ80. It is meant to be used in Snes9x emulator ports for ARM platforms.
@ the code is released under Snes9x license. See spcgen.c or any other source file
@ from Snes9x source tree.
.extern IAPU
.extern CPU @ for STOP and SLEEP
.extern S9xAPUGetByte
.extern S9xAPUSetByte
.extern S9xAPUGetByteZ
.extern S9xAPUSetByteZ
.global spc700_execute @ int cycles
.global Spc700JumpTab
opcode .req r3
cycles .req r4
context .req r5
opcodes .req r6
spc_pc .req r7
spc_ya .req r8
spc_p .req r9
spc_x .req r10
spc_s .req r11
spc_ram .req lr
.equ iapu_directpage, 0x00
.equ iapu_ram, 0x44
.equ iapu_extraram, 0x48
.equ iapu_allregs_load, 0x30
.equ iapu_allregs_save, 0x34
.equ flag_c, 0x01
.equ flag_z, 0x02
.equ flag_i, 0x04
.equ flag_h, 0x08
.equ flag_b, 0x10
.equ flag_d, 0x20
.equ flag_o, 0x40
.equ flag_n, 0x80
@ --------------------------- Framework --------------------------
spc700_execute: @ int cycles
stmfd sp!,{r4-r11,lr}
ldr context,=IAPU @ Pointer to SIAPU struct
mov cycles,r0 @ Cycles
add r0,context,#iapu_allregs_load
ldmia r0,{opcodes,spc_pc,spc_ya,spc_p,spc_x,spc_ram}
mov spc_s,spc_x,lsr #8
and spc_x,spc_x,#0xff
ldrb opcode,[spc_pc],#1 @ Fetch first opcode
ldr pc,[opcodes,opcode,lsl #2] @ Jump to opcode handler
@ We come back here after execution
spc700End:
orr spc_x,spc_x,spc_s,lsl #8
add r0,context,#iapu_allregs_save
stmia r0,{spc_pc,spc_ya,spc_p,spc_x}
mov r0,cycles
ldmfd sp!,{r4-r11,pc}
.ltorg
Apu00:
subs cycles,cycles,#30
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu01:
sub r0,spc_pc,spc_ram
add r1,spc_ram,spc_s
strb r0,[r1,#0xff]
mov r0,r0,lsr #8
strb r0,[r1,#0x100]
sub spc_s,spc_s,#2
ldr r0,[context,#iapu_extraram]
ldrh r0,[r0,#0x1e]
add spc_pc,spc_ram,r0
subs cycles,cycles,#120
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu02:
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
orr r0,r0,#0x01
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu03:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
tst r0,#0x01
addeq spc_pc,spc_pc,#1
ldrnesb r0,[spc_pc],#1
addne spc_pc,spc_pc,r0
subne cycles,cycles,#30
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu04:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#45
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu05:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu06:
mov r0,spc_x
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#45
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu07:
ldrb r0,[spc_pc],#1
add r0,r0,spc_x
and r0,r0,#0xff
ldr r12,[context,#iapu_directpage]
ldrb r0,[r12,r0]!
ldrb r12,[r12,#1]
orr r0,r0,r12,lsl #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu08:
ldrb r0,[spc_pc],#1
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#30
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu09:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
orr spc_x,spc_x,r0,lsl #24 @ save from harm
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
orr r0,r0,spc_x,lsr #24
and spc_x,spc_x,#0xff
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu0A:
ldrb r0,[spc_pc],#1
ldrb r1,[spc_pc],#1
add r0,r0,r1,lsl #8
mov r1,r1,lsr #5
mov r0,r0,lsl #19
mov r0,r0,lsr #19
orr spc_x,spc_x,r1,lsl #29 @ store membit where it can survive memhandler call
bl S9xAPUGetByte
mov r1,spc_x,lsr #29
and spc_x,spc_x,#0xff
mov r0,r0,lsr r1
tst r0,#1
orrne spc_p,spc_p,#flag_c
ldr spc_ram,[context,#iapu_ram] @ restore what memhandler(s) messed up
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu0B:
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
tst r0,#0x80
orrne spc_p,spc_p,#flag_c
biceq spc_p,spc_p,#flag_c
mov r0,r0,lsl #1
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu0C:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
stmfd sp!,{r0}
bl S9xAPUGetByte
tst r0,#0x80
orrne spc_p,spc_p,#flag_c
biceq spc_p,spc_p,#flag_c
mov r0,r0,lsl #1
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldmfd sp!,{r1}
bl S9xAPUSetByte
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu0D:
mov r0,spc_p,lsr #24
and r1,r0,#0x80
tst r0,r0
orreq r1,r1,#flag_z
and spc_p,spc_p,#0x7d @ clear N & Z
orr spc_p,spc_p,r1
add r1,spc_ram,spc_s
strb spc_p,[r1,#0x100]
sub spc_s,spc_s,#1
orr spc_p,spc_p,r0,lsl #24
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu0E:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
orr spc_x,spc_x,r0,lsl #16 @ save from memhandler
bl S9xAPUGetByte
and r2,r0,spc_ya
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r2,lsl #24
orr r0,r0,spc_ya
mov r1,spc_x,lsr #16
and spc_x,spc_x,#0xff
bl S9xAPUSetByte
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu0F:
sub r0,spc_pc,spc_ram
add r1,spc_ram,spc_s
strb r0,[r1,#0xff]
mov r0,r0,lsr #8
strb r0,[r1,#0x100]
sub spc_s,spc_s,#2
mov r0,spc_p,lsr #24
and r1,r0,#0x80
tst r0,r0
orrne r1,r1,#flag_z
and spc_p,spc_p,#0x7d @ clear N & Z
orr spc_p,spc_p,r1
add r1,spc_ram,spc_s
strb spc_p,[r1,#0x100]
sub spc_s,spc_s,#1
orr spc_p,spc_p,#flag_b
bic spc_p,spc_p,#flag_i
ldr r0,[context,#iapu_extraram]
ldrh r0,[r0,#0x20]
add spc_pc,spc_ram,r0
subs cycles,cycles,#120
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu10:
tst spc_p,#0x80000000
addne spc_pc,spc_pc,#1
ldreqsb r0,[spc_pc],#1
addeq spc_pc,spc_pc,r0
subeq cycles,cycles,#30
subs cycles,cycles,#30
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu11:
sub r0,spc_pc,spc_ram
add r1,spc_ram,spc_s
strb r0,[r1,#0xff]
mov r0,r0,lsr #8
strb r0,[r1,#0x100]
sub spc_s,spc_s,#2
ldr r0,[context,#iapu_extraram]
ldrh r0,[r0,#0x1c]
add spc_pc,spc_ram,r0
subs cycles,cycles,#120
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu12:
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
bic r0,r0,#0x01
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu13:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
tst r0,#0x01
addne spc_pc,spc_pc,#1
ldreqsb r0,[spc_pc],#1
addeq spc_pc,spc_pc,r0
subeq cycles,cycles,#30
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu14:
ldrb r0,[spc_pc],#1
add r0,r0,spc_x
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu15:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
add r0,r0,spc_x
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu16:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
add r0,r0,spc_ya,lsr #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu17:
ldrb r0,[spc_pc],#1
ldr r12,[context,#iapu_directpage]
ldrb r0,[r12,r0]!
ldrb r12,[r12,#1]
orr r0,r0,r12,lsl #8
add r0,r0,spc_ya,lsr #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu18:
ldrb r0,[spc_pc,#1]
bl S9xAPUGetByteZ
ldrb r1,[spc_pc],#1
orr r0,r0,r1
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu19:
mov r0,spc_x
bl S9xAPUGetByteZ
orr spc_x,spc_x,r0,lsl #24
mov r0,spc_ya,lsr #8
bl S9xAPUGetByteZ
orr r0,r0,spc_x,lsr #24
and spc_x,spc_x,#0xff
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
mov r1,spc_x
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu1A:
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
stmfd sp!,{r0}
ldrb r0,[spc_pc]
add r0,r0,#1
bl S9xAPUGetByteZ
ldmfd sp!,{r1}
orr r1,r1,r0,lsl #8
sub r0,r1,#1
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #16
tst r0,#0xff
orrne spc_p,spc_p,#0x01000000
stmfd sp!,{r0}
ldrb r1,[spc_pc]
bl S9xAPUSetByteZ
ldmfd sp!,{r0}
mov r0,r0,lsr #8
ldrb r1,[spc_pc],#1
add r1,r1,#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu1B:
ldrb r0,[spc_pc],#1
add r0,r0,spc_x
stmfd sp!,{r0}
bl S9xAPUGetByteZ
tst r0,#0x80
orrne spc_p,spc_p,#flag_c
biceq spc_p,spc_p,#flag_c
mov r0,r0,lsl #1
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldmfd sp!,{r1}
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu1C:
tst spc_ya,#0x80
orrne spc_p,spc_p,#flag_c
biceq spc_p,spc_p,#flag_c
and r0,spc_ya,#0x7f
and spc_ya,spc_ya,#0xff00
orr spc_ya,spc_ya,r0,lsl #1
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#30
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu1D:
sub spc_x,spc_x,#1
and spc_x,spc_x,#0xff
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_x,lsl #24
subs cycles,cycles,#30
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu1E:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
subs r12,spc_x,r0
orrge spc_p,spc_p,#flag_c
biclt spc_p,spc_p,#flag_c
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r12,lsl #24
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu1F:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
add r0,r0,spc_x
sub sp,sp,#8
str r0,[sp,#4]
bl S9xAPUGetByte
str r0,[sp]
ldr r0,[sp,#4]
add r0,r0,#1
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
ldr r1,[sp],#8
orr r0,r1,r0,lsl #8
add spc_pc,spc_ram,r0
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu20:
bic spc_p,spc_p,#flag_d
str spc_ram,[context,#iapu_directpage]
subs cycles,cycles,#30
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu21:
sub r0,spc_pc,spc_ram
add r1,spc_ram,spc_s
strb r0,[r1,#0xff]
mov r0,r0,lsr #8
strb r0,[r1,#0x100]
sub spc_s,spc_s,#2
ldr r0,[context,#iapu_extraram]
ldrh r0,[r0,#0x1a]
add spc_pc,spc_ram,r0
subs cycles,cycles,#120
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu22:
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
orr r0,r0,#0x02
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu23:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
tst r0,#0x02
addeq spc_pc,spc_pc,#1
ldrnesb r0,[spc_pc],#1
addne spc_pc,spc_pc,r0
subne cycles,cycles,#30
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu24:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#45
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu25:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu26:
mov r0,spc_x
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#45
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu27:
ldrb r0,[spc_pc],#1
add r0,r0,spc_x
and r0,r0,#0xff
ldr r12,[context,#iapu_directpage]
ldrb r0,[r12,r0]!
ldrb r12,[r12,#1]
orr r0,r0,r12,lsl #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu28:
ldrb r0,[spc_pc],#1
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#30
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu29:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
stmfd sp!,{r0}
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
ldmfd sp!,{r1}
and r0,r0,r1
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu2A:
ldrb r0,[spc_pc],#1
ldrb r1,[spc_pc],#1
add r0,r0,r1,lsl #8
mov r1,r1,lsr #5
mov r0,r0,lsl #19
mov r0,r0,lsr #19
orr spc_x,spc_x,r1,lsl #29 @ store membit where it can survive memhandler call
bl S9xAPUGetByte
mov r1,spc_x,lsr #29
and spc_x,spc_x,#0xff
mov r0,r0,lsr r1
tst r0,#1
orreq spc_p,spc_p,#flag_c
ldr spc_ram,[context,#iapu_ram] @ restore what memhandler(s) messed up
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu2B:
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
mov r0,r0,lsl #1
tst spc_p,#flag_c
orrne r0,r0,#1
tst r0,#0x100
orrne spc_p,spc_p,#flag_c
biceq spc_p,spc_p,#flag_c
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu2C:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
stmfd sp!,{r0}
bl S9xAPUGetByte
mov r0,r0,lsl #1
tst spc_p,#flag_c
orrne r0,r0,#1
tst r0,#0x100
orrne spc_p,spc_p,#flag_c
biceq spc_p,spc_p,#flag_c
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldmfd sp!,{r1}
bl S9xAPUSetByte
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu2D:
add r1,spc_ram,spc_s
strb spc_ya,[r1,#0x100]
sub spc_s,spc_s,#1
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu2E:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
and r1,spc_ya,#0xff
cmp r0,r1
addeq spc_pc,spc_pc,#1
ldrnesb r0,[spc_pc],#1
addne spc_pc,spc_pc,r0
subne cycles,cycles,#30
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu2F:
ldrsb r0,[spc_pc],#1
add spc_pc,spc_pc,r0
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu30:
tst spc_p,#0x80000000
addeq spc_pc,spc_pc,#1
ldrnesb r0,[spc_pc],#1
addne spc_pc,spc_pc,r0
subne cycles,cycles,#30
subs cycles,cycles,#30
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu31:
sub r0,spc_pc,spc_ram
add r1,spc_ram,spc_s
strb r0,[r1,#0xff]
mov r0,r0,lsr #8
strb r0,[r1,#0x100]
sub spc_s,spc_s,#2
ldr r0,[context,#iapu_extraram]
ldrh r0,[r0,#0x18]
add spc_pc,spc_ram,r0
subs cycles,cycles,#120
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu32:
ldrb r0,[spc_pc]
bl S9xAPUGetByteZ
bic r0,r0,#0x02
ldrb r1,[spc_pc],#1
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu33:
ldrb r0,[spc_pc],#1
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
tst r0,#0x02
addne spc_pc,spc_pc,#1
ldreqsb r0,[spc_pc],#1
addeq spc_pc,spc_pc,r0
subeq cycles,cycles,#30
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu34:
ldrb r0,[spc_pc],#1
add r0,r0,spc_x
bl S9xAPUGetByteZ
ldr spc_ram,[context,#iapu_ram]
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#60
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu35:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
add r0,r0,spc_x
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu36:
ldrb r0,[spc_pc],#1
ldrb r12,[spc_pc],#1
orr r0,r0,r12,lsl #8
add r0,r0,spc_ya,lsr #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu37:
ldrb r0,[spc_pc],#1
ldr r12,[context,#iapu_directpage]
ldrb r0,[r12,r0]!
ldrb r12,[r12,#1]
orr r0,r0,r12,lsl #8
add r0,r0,spc_ya,lsr #8
bl S9xAPUGetByte
ldr spc_ram,[context,#iapu_ram]
orr r0,r0,#0xff00
and spc_ya,spc_ya,r0
and spc_p,spc_p,#0xff
orr spc_p,spc_p,spc_ya,lsl #24
subs cycles,cycles,#90
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu38:
ldrb r0,[spc_pc,#1]
bl S9xAPUGetByteZ
ldrb r1,[spc_pc],#2
and r0,r0,r1
and spc_p,spc_p,#0xff
orr spc_p,spc_p,r0,lsl #24
ldrb r1,[spc_pc,#-1]
bl S9xAPUSetByteZ
ldr spc_ram,[context,#iapu_ram]
subs cycles,cycles,#75
ldrgeb opcode,[spc_pc],#1
ldrge pc,[opcodes,opcode,lsl #2]
b spc700End
Apu39:
mov r0,spc_x
bl S9xAPUGetByteZ
stmfd sp!,{r0}
mov r0,spc_ya,lsr #8
bl S9xAPUGetByteZ