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For LMUL=1/2 or LMUL=1/4 the result is not calculated correctly. For the vslidedown.vi v8, v1, 7 instruction (SEW=8, LMUL=1/4, VL=8) the UVM environment throws the following warning:
# UVM_WARNING cvxif_scoreboard.svh(412) @ 15660: uvm_test_top.env.scoreboard [CVXIF_SCOREBOARD] Instr "vslidedown.vi v8, v1, 7 mf4, tu, mu" with id = 5 in Prog "slide_imm" failed:
# at 15660 ns:
# State Difference
# ref.vproc_register[8]: 222fdebad92347aa6105c675f9f005dfb4da4ac62bab1af6000000000000007b, dut.vproc_reg[8]: 222fdebad92347aa6105c675f9f005dfb4da4ac62bab1af62d0a8ee15971837b
The RISC-V "V" specifications describe the following behavior (see section 16.3.2.) for the slidedown instruction:
# vslidedown behavior for source elements for element i in slide
0 <= i+OFFSET < VLMAX src[i] = vs2[i+OFFSET]
VLMAX <= i+OFFSET src[i] = 0
# Note: VLMAX = LMUL*VLEN/SEW = (1/4)*256/8 = 8
Vicuna does not apply this rule, but instead slides elements that exceed VLMAX into the result vector (this is not compliant with the RVV specs).
How to reproduce
You can reproduce this issue by running the cvxif_test_direct_issue_99 in the UVM environment.
The text was updated successfully, but these errors were encountered:
Hi @michael-platzer,
Issue
For
LMUL=1/2
orLMUL=1/4
the result is not calculated correctly. For thevslidedown.vi v8, v1, 7
instruction (SEW=8
,LMUL=1/4
,VL=8
) the UVM environment throws the following warning:The RISC-V "V" specifications describe the following behavior (see section 16.3.2.) for the
slidedown
instruction:Vicuna does not apply this rule, but instead slides elements that exceed
VLMAX
into the result vector (this is not compliant with the RVV specs).How to reproduce
You can reproduce this issue by running the
cvxif_test_direct_issue_99
in the UVM environment.The text was updated successfully, but these errors were encountered: