From edd980be3b92c6b44a612cb42d76eefa72b079d7 Mon Sep 17 00:00:00 2001 From: Roman Walch <9820846+rw0x0@users.noreply.github.com> Date: Wed, 22 Jan 2025 13:31:04 +0100 Subject: [PATCH] debug for testcases --- iris-mpc-gpu/tests/bucket_threshold.rs | 2 +- iris-mpc-gpu/tests/buckets.rs | 3 ++- iris-mpc-gpu/tests/one_bucket.rs | 4 ++-- iris-mpc-gpu/tests/threshold.rs | 4 ++-- iris-mpc-gpu/tests/threshold_and_or_tree.rs | 4 ++-- 5 files changed, 9 insertions(+), 8 deletions(-) diff --git a/iris-mpc-gpu/tests/bucket_threshold.rs b/iris-mpc-gpu/tests/bucket_threshold.rs index 674983417..ae58bfee5 100644 --- a/iris-mpc-gpu/tests/bucket_threshold.rs +++ b/iris-mpc-gpu/tests/bucket_threshold.rs @@ -110,7 +110,7 @@ mod bucket_threshold_test { let mod_ = 1u64 << (16 + B_BITS); let mut res = Vec::with_capacity(code_input.len()); for (c, m) in code_input.into_iter().zip(mask_input) { - let r = ((m as u64) * A - ((c as u64) << B_BITS) - 1) % mod_; + let r = (((m as u64) * A).wrapping_sub(((c as u64) << B_BITS).wrapping_sub(1))) % mod_; let msb = r >> (B_BITS + 16 - 1) & 1 == 1; res.push(msb) } diff --git a/iris-mpc-gpu/tests/buckets.rs b/iris-mpc-gpu/tests/buckets.rs index d1205d44f..9d406eb13 100644 --- a/iris-mpc-gpu/tests/buckets.rs +++ b/iris-mpc-gpu/tests/buckets.rs @@ -101,7 +101,8 @@ mod buckets_test { let mut count = 0; for (c, m) in code_input.iter().cloned().zip(mask_input.iter().cloned()) { - let r = ((m as u64) * a - ((c as u64) << B_BITS) - 1) % mod_; + let r = + (((m as u64) * a).wrapping_sub(((c as u64) << B_BITS).wrapping_sub(1))) % mod_; let msb = r >> (B_BITS + 16 - 1) & 1 == 1; count += msb as u32; } diff --git a/iris-mpc-gpu/tests/one_bucket.rs b/iris-mpc-gpu/tests/one_bucket.rs index 4a957067a..3577065ba 100644 --- a/iris-mpc-gpu/tests/one_bucket.rs +++ b/iris-mpc-gpu/tests/one_bucket.rs @@ -47,7 +47,7 @@ mod one_bucket_test { fn rep_share(value: u16, rng: &mut R) -> (u16, u16, u16) { let a = rng.gen(); let b = rng.gen(); - let c= value.wrapping_sub(a).wrapping_sub(b); + let c = value.wrapping_sub(a).wrapping_sub(b); (a, b, c) } @@ -94,7 +94,7 @@ mod one_bucket_test { let mod_ = 1u64 << (16 + B_BITS); let mut count = 0; for (c, m) in code_input.into_iter().zip(mask_input) { - let r = ((m as u64) * A - ((c as u64) << B_BITS) - 1) % mod_; + let r = (((m as u64) * A).wrapping_sub(((c as u64) << B_BITS).wrapping_sub(1))) % mod_; let msb = r >> (B_BITS + 16 - 1) & 1 == 1; count += msb as u32; } diff --git a/iris-mpc-gpu/tests/threshold.rs b/iris-mpc-gpu/tests/threshold.rs index 5adcf93c9..ee75ed922 100644 --- a/iris-mpc-gpu/tests/threshold.rs +++ b/iris-mpc-gpu/tests/threshold.rs @@ -48,7 +48,7 @@ mod threshold_test { fn rep_share(value: u16, rng: &mut R) -> (u16, u16, u16) { let a = rng.gen(); let b = rng.gen(); - let c= value.wrapping_sub(a).wrapping_sub(b); + let c = value.wrapping_sub(a).wrapping_sub(b); (a, b, c) } @@ -110,7 +110,7 @@ mod threshold_test { let mod_ = 1u64 << (16 + B_BITS); let mut res = Vec::with_capacity(code_input.len()); for (c, m) in code_input.into_iter().zip(mask_input) { - let r = ((m as u64) * A - ((c as u64) << B_BITS) - 1) % mod_; + let r = (((m as u64) * A).wrapping_sub(((c as u64) << B_BITS).wrapping_sub(1))) % mod_; let msb = r >> (B_BITS + 16 - 1) & 1 == 1; res.push(msb) } diff --git a/iris-mpc-gpu/tests/threshold_and_or_tree.rs b/iris-mpc-gpu/tests/threshold_and_or_tree.rs index 53bdd1cf1..6da2a7ab6 100644 --- a/iris-mpc-gpu/tests/threshold_and_or_tree.rs +++ b/iris-mpc-gpu/tests/threshold_and_or_tree.rs @@ -46,7 +46,7 @@ mod test_threshold_and_or_tree_test { fn rep_share(value: u16, rng: &mut R) -> (u16, u16, u16) { let a = rng.gen(); let b = rng.gen(); - let c= value.wrapping_sub(a).wrapping_sub(b); + let c = value.wrapping_sub(a).wrapping_sub(b); (a, b, c) } @@ -93,7 +93,7 @@ mod test_threshold_and_or_tree_test { let mod_ = 1u64 << (16 + B_BITS); let mut res = false; for (c, m) in code_input.into_iter().zip(mask_input) { - let r = ((m as u64) * A - ((c as u64) << B_BITS) - 1) % mod_; + let r = (((m as u64) * A).wrapping_sub(((c as u64) << B_BITS).wrapping_sub(1))) % mod_; let msb = r >> (B_BITS + 16 - 1) & 1 == 1; res |= msb; }