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Increase FAT cluster cache size from 0x600 to 0x3000 bytes for DS mod…
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…e games
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@RocketRobz
RocketRobz committed Jan 4, 2025
1 parent fe87222 commit cc89f02
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Showing 5 changed files with 20 additions and 21 deletions.
4 changes: 2 additions & 2 deletions retail/bootloader/source/arm7/patch_arm7.c
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Original file line number Diff line number Diff line change
Expand Up @@ -332,8 +332,8 @@ static void patchRamClear(const tNDSHeader* ndsHeader, const module_params_t* mo
}
if (ramClearOffset) {
// if (arm7newUnitCode > 0) {
*(ramClearOffset) = 0x02FFF000;
*(ramClearOffset + 1) = 0x02FFF000;
*(ramClearOffset) = 0x02FFC000;
*(ramClearOffset + 1) = 0x02FFC000;
// }
// ramClearOffset[3] -= 0x1800; // Shrink hi heap

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6 changes: 3 additions & 3 deletions retail/bootloaderi/source/arm7/hook_arm9.c
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Original file line number Diff line number Diff line change
Expand Up @@ -216,7 +216,7 @@ int hookNdsRetailArm9(
extern u32 dataToPreloadAddr[3];
extern u32 dataToPreloadSize[3];
// extern u32 dataToPreloadFrame;
extern bool romLocationAdjust(const tNDSHeader* ndsHeader, const bool laterSdk, const bool isSdk5, const bool dsiBios, u32* romLocation);
extern bool romLocationAdjust(const tNDSHeader* ndsHeader, const bool laterSdk, const bool isSdk5, u32* romLocation);
extern u32 dataToPreloadFullSize(void);
extern bool dataToPreloadFound(const tNDSHeader* ndsHeader);
const char* romTid = getRomTid(ndsHeader);
Expand Down Expand Up @@ -340,7 +340,7 @@ int hookNdsRetailArm9(
configureRomMap(ce9, ndsHeader, dataToPreloadAddr[0], dsiMode);
for (u32 i = 0; i < dataToPreloadFullSize(); i += cacheBlockSize) {
ce9->cacheAddress += cacheBlockSize;
romLocationAdjust(ndsHeader, laterSdk, (ce9->valueBits & b_isSdk5), (ce9->valueBits & b_dsiBios), &ce9->cacheAddress);
romLocationAdjust(ndsHeader, laterSdk, (ce9->valueBits & b_isSdk5), &ce9->cacheAddress);
ce9->cacheSlots--;
}
for (int i = 0; i < 3; i++) {
Expand Down Expand Up @@ -384,7 +384,7 @@ int hookNdsRetailArm9(
u32 addr = ce9->cacheAddress;

for (int slot = 0; slot < ce9->cacheSlots; slot++) {
romLocationAdjust(ndsHeader, laterSdk, (ce9->valueBits & b_isSdk5), (ce9->valueBits & b_dsiBios), &addr);
romLocationAdjust(ndsHeader, laterSdk, (ce9->valueBits & b_isSdk5), &addr);
cacheAddressTable[slot] = addr;
addr += cacheBlockSize;
}
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7 changes: 3 additions & 4 deletions retail/bootloaderi/source/arm7/ips.c
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Original file line number Diff line number Diff line change
Expand Up @@ -24,8 +24,7 @@ bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only
}

bool armPatched = false;
const bool dsiBios = scfgBios9i();
extern bool romLocationAdjust(const tNDSHeader* ndsHeader, const bool laterSdk, const bool isSdk5, const bool dsiBios, u32* romLocation);
extern bool romLocationAdjust(const tNDSHeader* ndsHeader, const bool laterSdk, const bool isSdk5, u32* romLocation);

int ipson = 5;
int totalrepeats = 0;
Expand Down Expand Up @@ -77,7 +76,7 @@ bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only
rombyteOffset++;
if (ROMinRAM && (ndsHeader->unitCode == 0 || !dsiModeConfirmed)) {
u32 u32_rombyteOffset = (u32)rombyteOffset;
romLocationAdjust(ndsHeader, laterSdk, isSdk5, dsiBios, &u32_rombyteOffset);
romLocationAdjust(ndsHeader, laterSdk, isSdk5, &u32_rombyteOffset);
rombyteOffset = (u8*)u32_rombyteOffset;
}
}
Expand All @@ -92,7 +91,7 @@ bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only
rombyteOffset++;
if (ROMinRAM && (ndsHeader->unitCode == 0 || !dsiModeConfirmed)) {
u32 u32_rombyteOffset = (u32)rombyteOffset;
romLocationAdjust(ndsHeader, laterSdk, isSdk5, dsiBios, &u32_rombyteOffset);
romLocationAdjust(ndsHeader, laterSdk, isSdk5, &u32_rombyteOffset);
rombyteOffset = (u8*)u32_rombyteOffset;
}
}
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22 changes: 11 additions & 11 deletions retail/bootloaderi/source/arm7/main.arm7.c
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Original file line number Diff line number Diff line change
Expand Up @@ -830,13 +830,13 @@ u32 getRomLocation(const tNDSHeader* ndsHeader, const bool isESdk2, const bool i
return getRomPartLocation(ndsHeader, isESdk2, isSdk5, dsiBios);
}

bool romLocationAdjust(const tNDSHeader* ndsHeader, const bool laterSdk, const bool isSdk5, const bool dsiBios, u32* romLocation) {
bool romLocationAdjust(const tNDSHeader* ndsHeader, const bool laterSdk, const bool isSdk5, u32* romLocation) {
const bool ntrType = (ndsHeader->unitCode == 0);
const u32 romLocationOld = *romLocation;
if (*romLocation == 0x0C3FC000) {
*romLocation += 0x4000;
} else if (*romLocation == 0x0C7C0000 && ((laterSdk && !dsiBios) || !laterSdk) && !isSdk5) {
*romLocation += laterSdk ? 0x8000 : 0x28000;
} else if (*romLocation == 0x0C7C0000 && !laterSdk) {
*romLocation += 0x28000;
} else if (*romLocation == 0x0C7C4000) {
*romLocation += 0x4000;
} else if (*romLocation == 0x0C7D8000 && laterSdk) {
Expand All @@ -846,13 +846,13 @@ bool romLocationAdjust(const tNDSHeader* ndsHeader, const bool laterSdk, const b
} else {
*romLocation += 0x8000;
}
} else if (*romLocation == 0x0C7F8000 && (laterSdk || !dsiBios) && ntrType) {
} else if (*romLocation == 0x0C7F8000 && laterSdk && ntrType) {
*romLocation += 0x8000;
} else if (*romLocation == 0x0C7FC000) {
*romLocation += 0x4000;
} else if (*romLocation == 0x0CFE0000 && !ntrType) {
*romLocation += 0x20000;
} else if (*romLocation == 0x0CFFC000 && (dsiBios || isSdk5)) {
} else if (*romLocation == 0x0CFFC000) {
*romLocation += 0x4000;
}
if (*romLocation == (consoleModel > 0 ? 0x0E000000 : 0x0D000000)) {
Expand Down Expand Up @@ -1235,7 +1235,7 @@ static void buildRomMap(const tNDSHeader* ndsHeader, const module_params_t* modu
romLocationChangePrep += 0x4000;
romSizeEdit[i] -= 0x4000;

readRom = (romSizeEdit[i] <= 0) ? true : romLocationAdjust(ndsHeader, laterSdk, isSdk5(moduleParams), dsiBios, &romLocationChangePrep);
readRom = (romSizeEdit[i] <= 0) ? true : romLocationAdjust(ndsHeader, laterSdk, isSdk5(moduleParams), &romLocationChangePrep);

// dbg_hexa(romLocationChangePrep);

Expand Down Expand Up @@ -1673,13 +1673,13 @@ int arm7_main(void) {
const char* romTid = getRomTid(&dsiHeaderTemp.ndshdr);
if (!isDSiWare || !scfgSdmmcEnabled || (REG_SCFG_ROM & BIT(9))) {
extern u32 clusterCacheSize;
clusterCacheSize = (ROMsupportsDsiMode(&dsiHeaderTemp.ndshdr) && dsiModeConfirmed) ? 0x7B0 : 0x600;
clusterCacheSize = (ROMsupportsDsiMode(&dsiHeaderTemp.ndshdr) && dsiModeConfirmed) ? 0x7B0 : 0x3000;

buildFatTableCacheCompressed(romFile);
if (!(romFile->fatTableSettings & fatCached)) {
dbg_printf("\n");
dbg_printf("Cluster cache is above 0x");
dbg_printf((clusterCacheSize == 0x7B0) ? "7B0" : "600");
dbg_hexa(clusterCacheSize);
dbg_printf(" bytes!\n");
dbg_printf("Please back up and restore the SD card contents to defragment it\n");
errorOutput();
Expand Down Expand Up @@ -1784,13 +1784,13 @@ int arm7_main(void) {
if (memcmp(romTid, "HND", 3) == 0) {
add = 0x108000; // 0x02808000
} */
const u32 add = 0xFF200; // 0x027FF200
tonccpy((char*)0x02700000+add, (char*)0x02700000, 0x600); // Move FAT table cache elsewhere
const u32 add = 0x8FC000; // 0x02FFC000
tonccpy((char*)0x02700000+add, (char*)0x02700000, 0x3000); // Move FAT table cache elsewhere
romFile->fatTableCache = (u32*)((u32)romFile->fatTableCache+add);
savFile->fatTableCache = (u32*)((u32)savFile->fatTableCache+add);
lastClusterCacheUsed = (u32*)((u32)lastClusterCacheUsed+add);
clusterCache += add;
toncset((char*)0x02700000, 0, 0x600);
toncset((char*)0x02700000, 0, 0x3000);
}

//if (gameOnFlashcard || !isDSiWare || !dsiWramAccess) {
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2 changes: 1 addition & 1 deletion retail/bootloaderi/source/arm7/patch_arm7.c
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Original file line number Diff line number Diff line change
Expand Up @@ -466,7 +466,7 @@ static void patchRamClear(const tNDSHeader* ndsHeader, const module_params_t* mo
}
if (ramClearOffset) {
*(ramClearOffset) = 0x02FFC000;
*(ramClearOffset + 1) = 0x02FFD000;
*(ramClearOffset + 1) = 0x02FFC000;
dbg_printf("RAM clear location : ");
dbg_hexa((u32)ramClearOffset);
dbg_printf("\n\n");
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