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bm13xx-chain: map generic OutputPin::Error correctly
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Georges760 committed Jan 5, 2025
1 parent 6929db3 commit 0311183
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Showing 2 changed files with 22 additions and 22 deletions.
16 changes: 8 additions & 8 deletions bm13xx-chain/src/error.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,11 @@ use bm13xx_asic::register::ChipIdentification;
use bm13xx_protocol::response::RegisterResponse;
use derive_more::From;

pub type Result<T, E> = core::result::Result<T, Error<E>>;
pub type Result<T, IO, G> = core::result::Result<T, Error<IO, G>>;

#[derive(PartialEq, From)]
#[cfg_attr(feature = "defmt-03", derive(defmt::Format))]
pub enum Error<E> {
pub enum Error<IO, G> {
/// We received a response from ASIC which does not correspond to the command sent
UnexpectedResponse { resp: [u8; 9] },
/// We received a register response which does not correspond to the register read command
Expand All @@ -22,24 +22,24 @@ pub enum Error<E> {
#[from]
Protocol(bm13xx_protocol::Error),
/// The serial interface returned an error
Io(E),
Io(IO),
/// The gpio interface returned an error
Gpio,
Gpio(G),
/// The serial interface returned an error while setting baudrate
SetBaudrate,
}

#[rustversion::since(1.81)]
impl<E: core::fmt::Debug> core::error::Error for Error<E> {}
impl<IO: core::fmt::Debug, G: core::fmt::Debug> core::error::Error for Error<IO, G> {}

#[rustversion::since(1.81)]
impl<E: core::fmt::Debug> core::fmt::Display for Error<E> {
impl<IO: core::fmt::Debug, G: core::fmt::Debug> core::fmt::Display for Error<IO, G> {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
write!(f, "{self:?}")
}
}

impl<E: core::fmt::Debug> core::fmt::Debug for Error<E> {
impl<IO: core::fmt::Debug, G: core::fmt::Debug> core::fmt::Debug for Error<IO, G> {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
match self {
Error::UnexpectedResponse { resp } => f
Expand All @@ -64,7 +64,7 @@ impl<E: core::fmt::Debug> core::fmt::Debug for Error<E> {
.finish(),
Error::Protocol(protocol_err) => f.debug_tuple("Protocol").field(protocol_err).finish(),
Error::Io(io_err) => f.debug_tuple("Io").field(io_err).finish(),
Error::Gpio => f.debug_struct("Gpio").finish(),
Error::Gpio(gpio_err) => f.debug_tuple("Gpio").field(gpio_err).finish(),
Error::SetBaudrate => f.debug_struct("SetBaudrate").finish(),
}
}
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28 changes: 14 additions & 14 deletions bm13xx-chain/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -127,7 +127,7 @@ impl<A: Asic, P: Read + Write + Baud, O: OutputPin, D: DelayNs> Chain<A, P, O, D
}
}

async fn send(&mut self, step: CmdDelay) -> Result<(), P::Error> {
async fn send(&mut self, step: CmdDelay) -> Result<(), P::Error, O::Error> {
self.port.write_all(&step.cmd).await.map_err(Error::Io)?;
self.delay.delay_ms(step.delay_ms).await;
Ok(())
Expand All @@ -145,10 +145,10 @@ impl<A: Asic, P: Read + Write + Baud, O: OutputPin, D: DelayNs> Chain<A, P, O, D
/// - Unexpected asic
/// - Protocol error
/// - Unexpected asic count
pub async fn enumerate(&mut self) -> Result<(), P::Error> {
self.reset.set_high().map_err(|_| Error::Gpio)?;
pub async fn enumerate(&mut self) -> Result<(), P::Error, O::Error> {
self.reset.set_high().map_err(Error::Gpio)?;
self.delay.delay_ms(10).await;
self.busy.set_low().map_err(|_| Error::Gpio)?;
self.busy.set_low().map_err(Error::Gpio)?;
let cmd = Command::read_reg(ChipIdentification::ADDR, Destination::All);
self.port.write_all(&cmd).await.map_err(Error::Io)?;

Expand Down Expand Up @@ -222,31 +222,31 @@ impl<A: Asic, P: Read + Write + Baud, O: OutputPin, D: DelayNs> Chain<A, P, O, D
Ok(())
}

pub async fn reset(&mut self) -> Result<(), P::Error> {
self.reset.set_low().map_err(|_| Error::Gpio)?;
pub async fn reset(&mut self) -> Result<(), P::Error, O::Error> {
self.reset.set_low().map_err(Error::Gpio)?;
self.asic.reset();
Ok(())
}

pub async fn send_job(&mut self, job: &[u8]) -> Result<u8, P::Error> {
pub async fn send_job(&mut self, job: &[u8]) -> Result<u8, P::Error, O::Error> {
self.port.write_all(job).await.map_err(Error::Io)?;
Ok(job.len() as u8)
}

pub async fn read_job(&mut self, job: &mut [u8]) -> Result<u8, P::Error> {
self.port.read_exact(job).await.map_err(Error::Io).unwrap();
pub async fn read_job(&mut self, job: &mut [u8]) -> Result<u8, P::Error, O::Error> {
self.port.read(job).await.map_err(Error::Io)?;
Ok(job.len() as u8)
}

pub async fn init(&mut self, diffculty: u32) -> Result<(), P::Error> {
pub async fn init(&mut self, diffculty: u32) -> Result<(), P::Error, O::Error> {
while let Some(step) = self.asic.init_next(diffculty) {
self.send(step).await?;
}
self.delay.delay_ms(100).await;
Ok(())
}

pub async fn set_baudrate(&mut self, baudrate: u32) -> Result<(), P::Error> {
pub async fn set_baudrate(&mut self, baudrate: u32) -> Result<(), P::Error, O::Error> {
while let Some(step) = self.asic.set_baudrate_next(
baudrate,
self.domain_cnt,
Expand All @@ -261,7 +261,7 @@ impl<A: Asic, P: Read + Write + Baud, O: OutputPin, D: DelayNs> Chain<A, P, O, D
Ok(())
}

pub async fn reset_all_cores(&mut self) -> Result<(), P::Error> {
pub async fn reset_all_cores(&mut self) -> Result<(), P::Error, O::Error> {
for asic_i in 0..self.asic_cnt {
while let Some(step) = self
.asic
Expand All @@ -274,15 +274,15 @@ impl<A: Asic, P: Read + Write + Baud, O: OutputPin, D: DelayNs> Chain<A, P, O, D
Ok(())
}

pub async fn set_hash_freq(&mut self, freq: HertzU64) -> Result<(), P::Error> {
pub async fn set_hash_freq(&mut self, freq: HertzU64) -> Result<(), P::Error, O::Error> {
while let Some(step) = self.asic.set_hash_freq_next(freq) {
self.send(step).await?;
}
self.delay.delay_ms(100).await;
Ok(())
}

pub async fn set_version_rolling(&mut self, mask: u32) -> Result<(), P::Error> {
pub async fn set_version_rolling(&mut self, mask: u32) -> Result<(), P::Error, O::Error> {
if self.asic.has_version_rolling() {
while let Some(step) = self.asic.set_version_rolling_next(mask) {
self.send(step).await?;
Expand Down

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