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Arkanoid for FPGA Tang Nano 20K. System Verilog

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Nanoid20K

Arkanoid for Tang Nano 20K - System Verilog
Using GoWin DVI IP.
Generate 640x480 VGA signal with 25mhz pixel clock -> GoWin DVI IP -> HDMI.
Use a programmable onboard oscillator as a clock source of course.
Added score counter.
Added levels.
Added state machine.

TODO:

  • DualShock 2 support

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Arkanoid for FPGA Tang Nano 20K. System Verilog

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