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test phase
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berkeleyions committed May 14, 2021
1 parent 2b63a34 commit 097c012
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Showing 10 changed files with 6 additions and 5 deletions.
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1 change: 1 addition & 0 deletions dataset_db.pyon
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{}
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1 change: 1 addition & 0 deletions last_rid.pyon
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9 changes: 4 additions & 5 deletions subsequences/setup_single_ion_vaet.py
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Expand Up @@ -26,13 +26,14 @@ class SetupSingleIonVAET:
phase_ref_time=np.int64(-1)
implemented_phase=0.
implemented_amp=0.
test_phase="SingleIonVAET.test_phase"


def subsequence(self):
s = SetupSingleIonVAET
trap_frequency = self.get_trap_frequency(s.selection_sideband)
offset = self.get_offset_frequency("729G")
freq_blue = 80*MHz +trap_frequency + s.nu_eff + offset
freq_blue = 80*MHz + trap_frequency + s.nu_eff + offset
freq_red = 80*MHz - trap_frequency - s.nu_eff + offset
freq_carr = 80*MHz + offset
dp_freq = self.calc_frequency(
Expand Down Expand Up @@ -68,7 +69,7 @@ def subsequence(self):
freq_carr,
amplitude=s.noise_amp,
ref_time_mu=s.phase_ref_time,
phase=0.26 #0.381
phase=0.25 #0.381

)

Expand Down Expand Up @@ -137,7 +138,6 @@ def subsequence(self):
self.dds_729_SP.set_att(s.J_att)
self.dds_729_SP_bichro.set_att(s.delta_att)
self.dds_SP_729L1.set_att(s.noise_att)

self.dds_729_SP_line1_bichro.set_att(s.BSB_att)
self.dds_729_SP_line2_bichro.set_att(s.RSB_att)

Expand All @@ -146,15 +146,14 @@ def subsequence(self):
self.dds_729_SP.sw.on()
self.dds_729_SP_bichro.sw.on()
self.dds_SP_729L1.sw.on()

self.dds_729_SP_line1_bichro.sw.on()
self.dds_729_SP_line2_bichro.sw.on()
delay(s.duration)

with parallel:
self.dds_729.sw.off()
self.dds_729_SP.sw.off()
self.dds_729_SP_bichro.sw.off()

self.dds_729L1.sw.off()
self.dds_729_SP_line1_bichro.sw.off()
self.dds_729_SP_line2_bichro.sw.off()

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