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clean up some paper description
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yiying-zhang committed Mar 10, 2024
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4 changes: 2 additions & 2 deletions _data/publications.yml
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abbreviation: "arxiv 2024"
tag: [ml]

- link: https://arxiv.org/pdf/2109.07744.pdf
- link: https://arxiv.org/abs/2109.07744
title: "SuperNIC: An FPGA-Based, Cloud-Oriented SmartNIC"
author: Will Lin*, Yizhou Shan*, Ryan Kosta, Arvind Krishnamurthy, Yiying Zhang (* equal contribution)
conference: to appear at the 32nd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
abbreviation: "FPGA '24"
highlight: "Best Paper Runner-Up Award"
tag: [serverless, net, arch]
tag: [net, arch]

- link: https://cseweb.ucsd.edu/~yiying/Mira-SOSP23.pdf
title: "Mira: A Program-Behavior-Guided Far Memory System"
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2 changes: 1 addition & 1 deletion _includes/news.html
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Expand Up @@ -15,7 +15,7 @@ <h2>News</h2>
Mar 2024
</div>
<div class="span8 text-wrap">
<b><a target="_blank" href="https://arxiv.org/pdf/2109.07744.pdf">SuperNIC</a></b> won the Best Paper Runner-Up Award at FPGA 2024
<b><a target="_blank" href="https://arxiv.org/abs/2109.07744">SuperNIC</a></b> (multi-tenant FPGA-based SmartNIC) won the Best Paper Runner-Up Award at FPGA 2024
</p>

<p>
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29 changes: 19 additions & 10 deletions _posts/research/2014-07-17-Systems-&-Networking.html
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<hr>

<div class="row-fluid">
<h3>Disaggregating Network Functionalities: A Consolidation Approach with SuperNIC</h3>
<h3>Network Task Disaggregation and Consolidation with NetPool</h3>
<div class="span6">
<p class="text-left">
Prior resource disaggregation works including our own demonstrated how to disaggregate
compute, memory, and storage resources. We, for the first
time, demonstrate how to disaggregate network resources by
proposing a new distributed hardware framework called <b>SuperNIC</b>.
Each SuperNIC connects a small set of endpoints
and consolidates network functionalities for these endpoints.
We prototyped SuperNIC with FPGA and demonstrate its
performance and cost benefits with real network functions
and customized disaggregated applications.
Servers in today's data centers host software and hardware resources for processing network packets. Managing and executing network tasks at each end host can be costly both in
capital cost and engineering effort. We propose to disaggregate network resources from end hosts to a separate
network resource pool. We propose <b>NetPool</b>, a distributed SmartNIC platform that pools together at the rack scale.
Each SmartNIC in NetPool consolidates network functionalities from multiple endpoints by fairly sharing limited hardware resources, and it achieves its
performance goals with an auto-scaled, highly parallel data plane and a scalable control plane.
</p>
</div>
</div>

<hr>

<div class="row-fluid">
<h3>FPGA-Based Multi-Tenant SmartNIC</h3>
<div class="span6">
<p class="text-left">
With CPU scaling slowing down in today's data centers, more functionalities are being offloaded from the CPU to auxiliary devices. One such device is the SmartNIC, which is being increasingly adopted in data centers. In today's cloud environment, VMs on the same server can each have their own network computation (or network tasks) or workflows of network tasks to offload to a SmartNIC. These network tasks can be dynamically added/removed as VMs come and go and can be shared across VMs. Such dynamism demands that a SmartNIC not only schedules and processes packets but also manages and executes offloaded network tasks for different users. Although software solutions like an OS exist for managing software-based network tasks, such software-based SmartNICs cannot keep up with the quickly increasing data-center network speed.
<br>
We built a new SmartNIC platform called <b>SuperNIC</b> that allows multiple tenants to efficiently and safely offload FPGA-based network computation DAGs. For efficiency and scalability, our core idea is to group network tasks into chains that are connected and scheduled as one unit. We further propose techniques to automatically scale network task chains with different types of parallelism. Moreover, we propose a fair share mechanism that considers both fair space sharing and fair time sharing of different types of hardware resources. Our FPGA prototype of SuperNIC achieves high bandwidth, low latency performance whilst efficiently utilizing and fairly sharing resources.
</p>
</div>
</div>
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35 changes: 16 additions & 19 deletions _posts/research/2014-07-19-Disaggregation-&-Serverless.html
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<hr>
<hr>

<div class="row-fluid">
<h3>Disaggregating Network Tasks: A Consolidation Approach with NetPool</h3>
<div class="span6">
<p class="text-left">
Servers in today's data centers host software and hardware resources for processing network packets. Managing and executing network tasks at each end host can be costly both in
capital cost and engineering effort. We propose to disaggregate network resources from end hosts to a separate
network resource pool. We propose <b>NetPool</b>, a distributed SmartNIC platform that pools together at the rack scale.
Each SmartNIC in NetPool consolidates network functionalities from multiple endpoints by fairly sharing limited hardware resources, and it achieves its
performance goals with an auto-scaled, highly parallel data plane and a scalable control plane.
</p>
</div>
</div>

<hr>



<div class="row-fluid">
<h3>Disaggregation and Program Behavior: A Static-Runtime-Codesign Approach with Mira</h3>
Expand Down Expand Up @@ -64,25 +80,6 @@ <h3>Disaggregating Serverless Computing: A Resource-Centric Approach with Scad</

<hr>

<div class="row-fluid">
<h3>Disaggregating Network Functionalities: A Consolidation Approach with SuperNIC</h3>
<div class="span6">
<p class="text-left">
Prior resource disaggregation works including our own demonstrated how to disaggregate
compute, memory, and storage resources. We, for the first
time, demonstrate how to disaggregate network resources by
proposing a new distributed hardware framework called <b>SuperNIC</b>.
Each SuperNIC connects a small set of endpoints
and consolidates network functionalities for these endpoints.
We prototyped SuperNIC with FPGA and demonstrate its
performance and cost benefits with real network functions
and customized disaggregated applications.
</p>
</div>
</div>

<hr>

<div class="row-fluid">
<h3>Disaggregating Memory: A Hardware Aproach with Clio</h3>
<div class="span6">
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