fix a2q

Xilinx · Jan 22, 2025 · f7c567b · f7c567b
1 parent b71deec
commit f7c567b
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/src/brevitas/quant/base.py b/src/brevitas/quant/base.py
@@ -363,6 +363,7 @@ class AccumulatorAwarePerChannelPreNorm(PerChannelPreNorm):
     pre_scaling_impl = AccumulatorAwareParameterPreScaling
     accumulator_bit_width = (this << 1).accumulator_bit_width
     accumulator_bit_width_impl = (this << 1).accumulator_bit_width_impl
+    restrict_pre_scaling_impl = (this << 1).restrict_pre_scaling_impl
 
 
 class AccumulatorAwareZeroCenterPerChannelPreNorm(AccumulatorAwarePerChannelPreNorm):