support ros boot up

CMakeLists.txt

@@ -248,3 +248,5 @@ include_directories(
 add_subdirectory(src)
 add_subdirectory(lib)
 add_subdirectory(board)
+
+include(cmake/gen_syterkit_vscode.cmake)

board/100ask-ros/board.c

@@ -17,7 +17,7 @@
 #include <sys-dram.h>
 #include <sys-gpio.h>
 #include <sys-i2c.h>
-#include <mmc/sys-sdhci.h>
+#include <sys-sdcard.h>
 #include <sys-sid.h>
 #include <sys-spi.h>
 #include <sys-uart.h>
@@ -42,37 +42,23 @@ sunxi_serial_t uart_dbg = {
         },
 };
 
-sunxi_sdhci_t sdhci0 = {
+sdhci_t sdhci0 = {
         .name = "sdhci0",
-        .id = MMC_CONTROLLER_0,
-        .reg_base = SUNXI_SMHC0_BASE,
-        .sdhci_mmc_type = MMC_TYPE_SD,
-        .max_clk = 50000000,
-        .width = SMHC_WIDTH_4BIT,
-        .dma_des_addr = SDRAM_BASE + 0x10080000,
-        .pinctrl = {
-                .gpio_clk = {GPIO_PIN(GPIO_PORTF, 2), GPIO_PERIPH_MUX2},
-                .gpio_cmd = {GPIO_PIN(GPIO_PORTF, 3), GPIO_PERIPH_MUX2},
-                .gpio_d0 = {GPIO_PIN(GPIO_PORTF, 1), GPIO_PERIPH_MUX2},
-                .gpio_d1 = {GPIO_PIN(GPIO_PORTF, 0), GPIO_PERIPH_MUX2},
-                .gpio_d2 = {GPIO_PIN(GPIO_PORTF, 5), GPIO_PERIPH_MUX2},
-                .gpio_d3 = {GPIO_PIN(GPIO_PORTF, 4), GPIO_PERIPH_MUX2},
-                .gpio_cd = {GPIO_PIN(GPIO_PORTF, 6), GPIO_INPUT},
-                .cd_level = GPIO_LEVEL_LOW,
-        },
-        .clk_ctrl = {
-                .gate_reg_base = CCU_BASE + CCU_SMHC_BGR_REG,
-                .gate_reg_offset = SDHCI_DEFAULT_CLK_GATE_OFFSET(0),
-                .rst_reg_base = CCU_BASE + CCU_SMHC_BGR_REG,
-                .rst_reg_offset = SDHCI_DEFAULT_CLK_RST_OFFSET(0),
-        },
-        .sdhci_clk = {
-                .reg_base = CCU_BASE + CCU_SMHC0_CLK_REG,
-                .reg_factor_n_offset = SDHCI_DEFAULT_CLK_FACTOR_N_OFFSET,
-                .reg_factor_m_offset = SDHCI_DEFAULT_CLK_FACTOR_M_OFFSET,
-                .clk_sel = 0x1,
-                .parent_clk = 300000000,
-        },
+        .id = 0,
+        .reg = (sdhci_reg_t *) SUNXI_SMHC0_BASE,
+        .voltage = MMC_VDD_27_36,
+        .width = MMC_BUS_WIDTH_4,
+        .clock = MMC_CLK_50M,
+        .removable = 0,
+        .isspi = FALSE,
+        .skew_auto_mode = FALSE,
+        .sdhci_pll = CCU_MMC_CTRL_PLL_PERIPH1X,
+        .gpio_clk = {GPIO_PIN(GPIO_PORTF, 2), GPIO_PERIPH_MUX2},
+        .gpio_cmd = {GPIO_PIN(GPIO_PORTF, 3), GPIO_PERIPH_MUX2},
+        .gpio_d0 = {GPIO_PIN(GPIO_PORTF, 1), GPIO_PERIPH_MUX2},
+        .gpio_d1 = {GPIO_PIN(GPIO_PORTF, 0), GPIO_PERIPH_MUX2},
+        .gpio_d2 = {GPIO_PIN(GPIO_PORTF, 5), GPIO_PERIPH_MUX2},
+        .gpio_d3 = {GPIO_PIN(GPIO_PORTF, 4), GPIO_PERIPH_MUX2},
 };
 
 sunxi_i2c_t i2c_pmu = {

board/100ask-ros/smhc_test/main.c

@@ -21,6 +21,7 @@
 
 extern sunxi_serial_t uart_dbg;
 extern uint32_t dram_para[32];
+extern sdhci_t sdhci0;
 extern sunxi_i2c_t i2c_pmu;
 
 static void set_pmu_fin_voltage(char *power_name, uint32_t voltage) {

board/avaota-cam/board.c

@@ -19,6 +19,7 @@
 #include <sys-dram.h>
 #include <sys-gpio.h>
 #include <sys-i2c.h>
+#include <sys-pwm.h>
 #include <sys-spi.h>
 #include <sys-uart.h>
 
@@ -183,6 +184,46 @@ sunxi_sdhci_t sdhci1 = {
         },
 };
 
+sunxi_pwm_channel_t pwm_channel[] = {
+        {
+                .pin = {GPIO_PIN(GPIO_PORTD, 1), GPIO_PERIPH_MUX5},
+                .channel_mode = PWM_CHANNEL_SINGLE,
+        },
+        {
+                .pin = {GPIO_PIN(GPIO_PORTD, 2), GPIO_PERIPH_MUX5},
+                .channel_mode = PWM_CHANNEL_SINGLE,
+        },
+        {
+                .pin = {GPIO_PIN(GPIO_PORTD, 3), GPIO_PERIPH_MUX5},
+                .bind_channel = 3,
+                .dead_time = 4000,
+                .channel_mode = PWM_CHANNEL_BIND,
+        },
+        {
+                .pin = {GPIO_PIN(GPIO_PORTD, 4), GPIO_PERIPH_MUX5},
+                .bind_channel = 2,
+                .dead_time = 4000,
+                .channel_mode = PWM_CHANNEL_BIND,
+        },
+};
+
+sunxi_pwm_t pwm_chip0 = {
+        .base = SUNXI_PWM_BASE,
+        .id = 0,
+        .channel = pwm_channel,
+        .channel_size = 4,
+        .pwm_clk = {
+                .gate_reg_base = SUNXI_CCU_APP_BASE + BUS_CLK_GATING0_REG,
+                .gate_reg_offset = BUS_CLK_GATING0_REG_PWM_PCLK_EN_OFFSET,
+                .rst_reg_base = SUNXI_CCU_APP_BASE + BUS_Reset0_REG,
+                .rst_reg_offset = BUS_Reset0_REG_PRESETN_PWM_SW_OFFSET,
+        },
+        .clk_src = {
+                .clk_src_hosc = 40000000,
+                .clk_src_apb = 384000000,
+        },
+};
+
 dram_para_t dram_para = {
         .dram_clk = 528,
         .dram_type = 2,

board/avaota-cam/cdk/avaota_cam.cdkproj

@@ -177,17 +177,17 @@
         <FileOption/>
       </File>
       <VirtualDirectory Name="chips">
-        <VirtualDirectory Name="sun20iw5">
-          <File Name="../../../include/drivers/chips/sun20iw5/reg-ccu.h">
+        <VirtualDirectory Name="sun300iw1">
+          <File Name="../../../include/drivers/chips/sun300iw1/reg-ccu.h">
             <FileOption/>
           </File>
-          <File Name="../../../include/drivers/chips/sun20iw5/reg-dram.h">
+          <File Name="../../../include/drivers/chips/sun300iw1/reg-dram.h">
             <FileOption/>
           </File>
-          <File Name="../../../include/drivers/chips/sun20iw5/reg-ncat.h">
+          <File Name="../../../include/drivers/chips/sun300iw1/reg-ncat.h">
             <FileOption/>
           </File>
-          <File Name="../../../include/drivers/chips/sun20iw5/reg-rproc.h">
+          <File Name="../../../include/drivers/chips/sun300iw1/reg-rproc.h">
             <FileOption/>
           </File>
         </VirtualDirectory>
@@ -407,22 +407,22 @@
         <FileOption/>
       </File>
       <VirtualDirectory Name="chips">
-        <File Name="../../../src/drivers/chips/sun20iw5/sys-clk.c">
+        <File Name="../../../src/drivers/chips/sun300iw1/sys-clk.c">
           <FileOption/>
         </File>
-        <File Name="../../../src/drivers/chips/sun20iw5/sys-dram.c" ExcludeProjConfig="">
+        <File Name="../../../src/drivers/chips/sun300iw1/sys-dram.c" ExcludeProjConfig="">
           <FileOption/>
         </File>
-        <File Name="../../../src/drivers/chips/sun20iw5/sys-rproc.c">
+        <File Name="../../../src/drivers/chips/sun300iw1/sys-rproc.c">
           <FileOption/>
         </File>
-        <File Name="../../../src/drivers/chips/sun20iw5/sys-sid.c">
+        <File Name="../../../src/drivers/chips/sun300iw1/sys-sid.c">
           <FileOption/>
         </File>
-        <File Name="../../../src/drivers/chips/sun20iw5/sys-wdt.c">
+        <File Name="../../../src/drivers/chips/sun300iw1/sys-wdt.c">
           <FileOption/>
         </File>
-        <File Name="../../../src/drivers/chips/sun20iw5/sys-sdhci.c">
+        <File Name="../../../src/drivers/chips/sun300iw1/sys-sdhci.c">
           <FileOption/>
         </File>
       </VirtualDirectory>
@@ -627,11 +627,11 @@
         <Tools/>
       </User>
       <Compiler>
-        <Define>CONFIG_CHIP_SUN20IW5;DEBUG_MODE</Define>
+        <Define>CONFIG_CHIP_SUN300IW1;DEBUG_MODE</Define>
         <Undefine/>
         <Optim>None (-O0)</Optim>
         <DebugLevel>Maximum (-g3)</DebugLevel>
-        <IncludePath>$(ProjectPath);../../../include/;../../../include/arch/riscv/;../../../include/cli/;../../../include/drivers/chips/sun20iw5/;../../../include/drivers/mmc/;../../../include/drivers/pmu/reg/;../../../include/drivers/pmu/;../../../include/drivers/reg/;../../../include/drivers/usb/;../../../include/image/;../../../include/lib/elf/;../../../include/lib/fatfs/;../../../include/lib/fdt/;../../../include/drivers/;../../../include/drivers/chips/;../../../include/drivers/mtd</IncludePath>
+        <IncludePath>$(ProjectPath);../../../include/;../../../include/arch/riscv/;../../../include/cli/;../../../include/drivers/chips/sun300iw1/;../../../include/drivers/mmc/;../../../include/drivers/pmu/reg/;../../../include/drivers/pmu/;../../../include/drivers/reg/;../../../include/drivers/usb/;../../../include/image/;../../../include/lib/elf/;../../../include/lib/fatfs/;../../../include/lib/fdt/;../../../include/drivers/;../../../include/drivers/chips/;../../../include/drivers/mtd</IncludePath>
         <OtherFlags>-nostdlib -nostdinc -march=rv32imafcxthead -mabi=ilp32f -Wno-int-to-pointer-cast -Wno-int-to-pointer-cast -Wno-shift-count-overflow -Wno-builtin-declaration-mismatch -Wno-pointer-to-int-cast -Wno-implicit-function-declaration -Wno-discarded-qualifiers -Wno-unused-function -Wno-unused-variable -Wno-unused-but-set-variable -Wno-parentheses</OtherFlags>
         <Verbose>no</Verbose>
         <Ansi>no</Ansi>
@@ -648,7 +648,7 @@
       <Asm>
         <Define/>
         <Undefine/>
-        <IncludePath>$(ProjectPath);../../../include/;../../../include/arch/riscv/;../../../include/cli/;../../../include/drivers/chips/sun20iw5/;../../../include/drivers/mmc/;../../../include/drivers/pmu/reg/;../../../include/drivers/pmu/;../../../include/drivers/reg/;../../../include/drivers/usb/;../../../include/image/;../../../include/lib/elf/;../../../include/lib/fatfs/;../../../include/lib/fdt/;../../../include/drivers/;../../../include/drivers/chips/</IncludePath>
+        <IncludePath>$(ProjectPath);../../../include/;../../../include/arch/riscv/;../../../include/cli/;../../../include/drivers/chips/sun300iw1/;../../../include/drivers/mmc/;../../../include/drivers/pmu/reg/;../../../include/drivers/pmu/;../../../include/drivers/reg/;../../../include/drivers/usb/;../../../include/image/;../../../include/lib/elf/;../../../include/lib/fatfs/;../../../include/lib/fdt/;../../../include/drivers/;../../../include/drivers/chips/</IncludePath>
         <OtherFlags/>
         <DebugLevel>none</DebugLevel>
       </Asm>

board/avaota-cam/hello_world/main.c

@@ -98,16 +98,16 @@ int cmd_load(int argc, const char **argv) {
 msh_declare_command(reset);
 msh_define_help(reset, "reset test", "Usage: reset\n");
 int cmd_reset(int argc, const char **argv) {
-	setbits_le32(SUNXI_PRCM_BASE + 0x1c, BIT(3)); /* enable WDT clk */
-	writel(0x16aa0000, SUNXI_RTC_WDG_BASE + 0x18); /* disable WDT */
-	writel(0x16aa0000 | BIT(0), SUNXI_RTC_WDG_BASE + 0x08); /* trigger WDT */
+    setbits_le32(SUNXI_PRCM_BASE + 0x1c, BIT(3));           /* enable WDT clk */
+    writel(0x16aa0000, SUNXI_RTC_WDG_BASE + 0x18);          /* disable WDT */
+    writel(0x16aa0000 | BIT(0), SUNXI_RTC_WDG_BASE + 0x08); /* trigger WDT */
     return 0;
 }
 
 msh_declare_command(bt);
 msh_define_help(bt, "backtrace test", "Usage: bt\n");
 int cmd_bt(int argc, const char **argv) {
-	dump_stack();
+    dump_stack();
     return 0;
 }
 
@@ -116,7 +116,7 @@ const msh_command_entry commands[] = {
         msh_define_command(read),
         msh_define_command(write),
         msh_define_command(bt),
-		msh_define_command(reset),
+        msh_define_command(reset),
         msh_command_end,
 };
 
@@ -127,7 +127,7 @@ int main(void) {
 
     sunxi_serial_init(&uart_card);
 
-    //show_banner();
+    show_banner();
 
     printk_info("Hello World!\n");
 

cmake/board/avaota-cam.cmake

@@ -2,11 +2,11 @@
 
 set(CONFIG_ARCH_RISCV32 True)
 set(CONFIG_ARCH_RISCV32_CORE_E907 True)
-set(CONFIG_CHIP_SUN20IW5 True)
+set(CONFIG_CHIP_SUN300IW1 True)
 set(CONFIG_CHIP_MMC_V2 True)
 set(CONFIG_BOARD_AVAOTA-CAM True)
 
-add_definitions(-DCONFIG_CHIP_SUN20IW5)
+add_definitions(-DCONFIG_CHIP_SUN300IW1)
 add_definitions(-DCONFIG_CHIP_MMC_V2)
 add_definitions(-DCONFIG_FATFS_CACHE_SIZE=0xFFFFFFF)
 add_definitions(-DCONFIG_FATFS_CACHE_ADDR=0x82000000)

cmake/gen_syterkit_vscode.cmake

@@ -0,0 +1,19 @@
+set(GEN_CONFIG_FILE "${CMAKE_BINARY_DIR}/syterkit_cmake_variables.txt")
+set(GEN_OUTPUT_FILE "${CMAKE_SOURCE_DIR}/.vscode/c_cpp_properties.json")
+
+# for auto generate VSCode Config
+file(WRITE "${GEN_CONFIG_FILE}")
+get_cmake_property(_variable_names VARIABLES)
+foreach(var_name ${_variable_names})
+    set(var_value ${${var_name}})
+    file(APPEND "${GEN_CONFIG_FILE}" "${var_name} = ${var_value}\n")
+endforeach()
+
+add_custom_command(
+    OUTPUT ${GEN_OUTPUT_FILE}
+    COMMAND python3 ${CMAKE_SOURCE_DIR}/tools/gen_vscode_json.py ${GEN_CONFIG_FILE} ${GEN_OUTPUT_FILE}
+    DEPENDS ${GEN_CONFIG_FILE}
+    COMMENT "Running Python script to generate c_cpp_properties.json"
+)
+
+add_custom_target(run_python_script ALL DEPENDS ${GEN_OUTPUT_FILE})

include/ctype.h

@@ -4,8 +4,8 @@
 #define __CTYPE_H__
 
 #ifdef __cplusplus
-extern "C" { 
-#endif // __cplusplus
+extern "C" {
+#endif// __cplusplus
 
 /**
  * Check if the given character is alphanumeric.
@@ -137,6 +137,6 @@ int toupper(int c);
 
 #ifdef __cplusplus
 }
-#endif // __cplusplus
+#endif// __cplusplus
 
 #endif /* __CTYPE_H__ */

include/drivers/chips/sun20iw5/reg-ccu.h → include/drivers/chips/sun300iw1/reg-ccu.h

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 
-#ifndef __SUN20IW5_REG_CCU_H__
-#define __SUN20IW5_REG_CCU_H__
+#ifndef __SUN300IW1_REG_CCU_H__
+#define __SUN300IW1_REG_CCU_H__
 
 #include <reg-ncat.h>
 
@@ -1885,4 +1885,4 @@
      << PLL_CPU_CTRL_REG_LOCK_ENABLE_OFFSET)
 #define PLL_LOCK_MASK (PLL_CPU_CTRL_REG_LOCK_CLEAR_MASK)
 
-#endif// __SUN20IW5_REG_CCU_H__
+#endif// __SUN300IW1_REG_CCU_H__

include/drivers/chips/sun20iw5/reg-dram.h → include/drivers/chips/sun300iw1/reg-dram.h

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 
-#ifndef __SUN20IW5_REG_DRAM_H__
-#define __SUN20IW5_REG_DRAM_H__
+#ifndef __SUN300IW1_REG_DRAM_H__
+#define __SUN300IW1_REG_DRAM_H__
 
 #define SDRAM_BASE (0x80000000)
 
@@ -106,4 +106,4 @@
 #define ZQ_RES_CTRL_REG (SUNXI_SYSCTRL_BASE + 0x168)
 #define ZQ_RES_STATUS_REG (SUNXI_SYSCTRL_BASE + 0x16C)
 
-#endif /* __SUN20IW5_REG_DRAM_H__ */
+#endif /* __SUN300IW1_REG_DRAM_H__ */

include/drivers/chips/sun20iw5/reg-ncat.h → include/drivers/chips/sun300iw1/reg-ncat.h

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 
-#ifndef __SUN20IW5_REG_NCAT_H__
-#define __SUN20IW5_REG_NCAT_H__
+#ifndef __SUN300IW1_REG_NCAT_H__
+#define __SUN300IW1_REG_NCAT_H__
 
 #define SUNXI_BROM_BASE 0x00000000
 #define SUNXI_SRAM_C_BASE 0x02000000
@@ -101,4 +101,4 @@
 #define POR_RESET_CTRL_REG (0X24)
 #define VCC33_DET_RSTN_ENABLE (1 << 4)
 
-#endif// __SUN20IW5_REG_NCAT_H__
+#endif// __SUN300IW1_REG_NCAT_H__

include/drivers/reg/reg-ccu.h

@@ -17,8 +17,8 @@ extern "C" {
     #include <sun55iw3/reg-ccu.h>
 #elif defined(CONFIG_CHIP_SUN50IW10)
     #include <sun50iw10/reg-ccu.h>
-#elif defined(CONFIG_CHIP_SUN20IW5)
-    #include <sun20iw5/reg-ccu.h>
+#elif defined(CONFIG_CHIP_SUN300IW1)
+    #include <sun300iw1/reg-ccu.h>
 #elif defined(CONFIG_CHIP_SUN60IW2)
     #include <sun60iw2/reg-ccu.h>
 #else

include/drivers/reg/reg-dram.h

@@ -13,8 +13,8 @@ extern "C" {
 #include <sun8iw20/reg-dram.h>
 #elif defined(CONFIG_CHIP_SUN20IW1)
 #include <sun20iw1/reg-dram.h>
-#elif defined(CONFIG_CHIP_SUN20IW5)
-#include <sun20iw5/reg-dram.h>
+#elif defined(CONFIG_CHIP_SUN300IW1)
+#include <sun300iw1/reg-dram.h>
 #endif
 
 #ifdef __cplusplus

include/drivers/reg/reg-ncat.h

@@ -19,8 +19,8 @@ extern "C" {
     #include <sun55iw3/reg-ncat.h>
 #elif defined(CONFIG_CHIP_SUN50IW10)
     #include <sun50iw10/reg-ncat.h>
-#elif defined(CONFIG_CHIP_SUN20IW5)
-    #include <sun20iw5/reg-ncat.h>
+#elif defined(CONFIG_CHIP_SUN300IW1)
+    #include <sun300iw1/reg-ncat.h>
 #elif defined(CONFIG_CHIP_SUN60IW2)
     #include <sun60iw2/reg-ncat.h>
 #else

include/drivers/reg/reg-rproc.h

@@ -13,8 +13,8 @@ extern "C" {
 #include <sun20iw1/reg-rproc.h>
 #elif defined(CONFIG_CHIP_SUN55IW3)
 #include <sun55iw3/reg-rproc.h>
-#elif defined(CONFIG_CHIP_SUN20IW5)
-#include <sun20iw5/reg-rproc.h>
+#elif defined(CONFIG_CHIP_SUN300IW1)
+#include <sun300iw1/reg-rproc.h>
 #endif
 
 #ifdef __cplusplus