STM32 SDMMC multiple block read/write support #3843
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can you fix CI? |
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Hello, I have added multiple block read and write support for the STM32 SDMMC peripheral.
This essentially adds CMD18 (multiple block read), CMD25 (multiple block write) and CMD12 (stop transmission) and sets the transfer up correctly.
I've tested this on SDMMCv2 devices.
I've also updated the
block_device_driverimplementation so it now supports multiple block read/writes. I also believe there is a preexisting issue that theblock_addressdoes not take into consideration the partition start offset, but I'll wait for confirmation from someone before modifying that.Please let me know what you think as this PR greatly improves the read/write speeds, I would love to see it merged asap.
Kind regards