WIP: Buffer cycling API test

src/io/dmabuf/arena.rs

@@ -12,7 +12,7 @@ use crate::v4l_sys::*;
 /// All buffers are released in the Drop impl.
 pub struct Arena {
     handle: Arc<Handle>,
-    pub bufs: Vec<OwnedFd>,
+    pub bufs: Vec<Option<OwnedFd>>,
     pub buf_type: buffer::Type,
 }
 
@@ -83,7 +83,7 @@ impl Arena {
                 )?;
                 OwnedFd::from_raw_fd(v4l2_exportbuf.fd)
             };
-            self.bufs.push(fd);
+            self.bufs.push(Some(fd));
         }
 
         let mut v4l2_reqbufs = v4l2_requestbuffers {

src/io/dmabuf/stream.rs

@@ -90,6 +90,50 @@ impl Stream {
     }
 }
 
+impl<'a> Stream where Self: CaptureStream<'a> {
+    /// Waits for a buffer to complete and removes it.
+    pub unsafe fn take_buffer(&mut self) -> io::Result<(OwnedFd, Metadata)> {
+        if !self.active {
+            // Enqueue all buffers once on stream start
+            for index in 0..self.arena.bufs.len() {
+                self.queue(index)?;
+            }
+
+            self.start()?;
+        } else {
+            let index = self.arena.bufs.iter()
+                .position(|b| b.is_some())
+                .unwrap_or(999);
+            self.queue(index)?;
+        }
+
+        let index = self.dequeue()?;
+
+        // The index used to access the buffer elements is given to us by v4l2, so we assume it
+        // will always be valid.
+        let buf = self.arena.bufs[index].take().unwrap();
+        let meta = self.buf_meta[index];
+        Ok((buf, meta))
+    }
+
+    /// Returns a buffer and removes a new buffer once it's ready
+    pub unsafe fn cycle_buffer(&mut self, buf: OwnedFd) -> io::Result<(OwnedFd, Metadata)> {
+        let index = self.arena.bufs.iter()
+            .position(|b| b.is_none())
+            .unwrap_or(999);
+        self.arena.bufs[index] = Some(buf);
+        self.queue(index)?;
+
+        let index = self.dequeue()?;
+
+        // The index used to access the buffer elements is given to us by v4l2, so we assume it
+        // will always be valid.
+        let buf = self.arena.bufs[index].take().unwrap();
+        let meta = self.buf_meta[index];
+        Ok((buf, meta))
+    }
+}
+
 impl Drop for Stream {
     fn drop(&mut self) {
         if let Err(e) = self.stop() {
@@ -142,7 +186,7 @@ impl StreamTrait for Stream {
 
 impl<'a> CaptureStream<'a> for Stream {
     fn queue(&mut self, index: usize) -> io::Result<()> {
-        let buf = &mut self.arena.bufs[index];
+        let buf = &mut self.arena.bufs[index].as_ref().unwrap();
         let mut v4l2_buf = v4l2_buffer {
             index: index as u32,
             memory: Memory::DmaBuf as u32,
@@ -208,7 +252,7 @@ impl<'a> CaptureStream<'a> for Stream {
 
         // The index used to access the buffer elements is given to us by v4l2, so we assume it
         // will always be valid.
-        let bytes = &mut self.arena.bufs[self.arena_index];
+        let bytes = &mut self.arena.bufs[self.arena_index].as_ref().unwrap();
         let meta = &self.buf_meta[self.arena_index];
         Ok((bytes, meta))
     }