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Use critical_section::CriticalSection for GPIO configuration #180

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@urdh urdh commented Aug 22, 2024

This change improves interoperability with RTICv2 (which exposes a bare_metal::CriticalSection during initialization).

@urdh urdh force-pushed the use-bare-metal-critical-sections branch 2 times, most recently from 3cccb82 to a52b4e8 Compare August 23, 2024 18:17
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TeXitoi commented Dec 3, 2024

We can’t do that as is. We need at least to provide a safe way of getting GPIOs.

Do you have any reference on another hal doing something similar, or a guideline about the removal of the token in cortex_m::interrupt::free?

@urdh urdh force-pushed the use-bare-metal-critical-sections branch from a52b4e8 to 7124498 Compare December 3, 2024 19:17
@urdh urdh force-pushed the use-bare-metal-critical-sections branch from 7124498 to 92d395f Compare December 3, 2024 19:18
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urdh commented Dec 3, 2024

As far as I can tell, most HALs don't require a critical section at all when reconfiguring GPIOs.

Upstream actually recommends critical_section::with as a replacement for cortex_m::interrupt::free, but that provides a different CriticalSection which is incompatible with the bare_metal one. Still, this crate should probably use critical_section rather than bare_metal.

(I guess ultimately I should log an issue with RTIC (again) to have RTIC use critical-section; in the meantime interfacing between the two will require a tiny bit of unsafe code.)

@urdh urdh changed the title Use bare_metal::CriticalSection for GPIO configuration Use critical_section::CriticalSection for GPIO configuration Dec 3, 2024
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2 participants