feat(stepper_motor): initial drv8434 driver

main_board/src/optics/polarizer/drv8434/drv8434.c

@@ -0,0 +1,142 @@
+/******************************************************************************
+ * @file drv8434.c
+ * @brief Source file for Texas Instruments DRV8434 stepper motor driver
+ *
+ * This file defines the application level interface functions for the DRV8434
+ * such as initialize, configure, and control
+ *
+ *
+ * @note All register addresses and bit definitions are based on
+ *       DRV8434 datasheet SLOSE70 – DECEMBER 2020
+ *
+ * @author Srikar Chintapalli
+ *
+ ******************************************************************************/
+
+#include "drv8434.h"
+
+static DRV8434_Instance_t g_drv8434_instance;
+
+ret_code_t
+drv8434_init(DRV8434_DriverCfg_t *cfg)
+{
+    // Wipe instance
+    memset(&g_drv8434_instance, 0, sizeof(DRV8434_Instance_t));
+
+    // Copy driver config over to runtime context
+    memcpy(&g_drv8434_instance.driver_cfg, cfg, sizeof(DRV8434_DriverCfg_t));
+
+    g_drv8434_instance.spi.rx_bufs.buffers = &g_drv8434_instance.spi.rx;
+    g_drv8434_instance.spi.rx_bufs.count = 1;
+    g_drv8434_instance.spi.tx_bufs.buffers = &g_drv8434_instance.spi.tx;
+    g_drv8434_instance.spi.tx_bufs.count = 1;
+
+    return RET_SUCCESS;
+}
+
+ret_code_t
+drv8434_disable(void)
+{
+    // Carry over existing bits in CTRL 2
+    DRV8434_CTRL2_REG_t ctrl2 = g_drv8434_instance.registers.ctrl2;
+    // Disable outputs
+    ctrl2.EN_OUT = false;
+    return drv8434_private_reg_write(DRV8434_REG_CTRL2_ADDR, ctrl2.raw,
+                                     &g_drv8434_instance);
+}
+
+ret_code_t
+drv8434_write_config(DRV8434_DeviceCfg_t *cfg)
+{
+    // Copy over desired device config to runtime context
+    memcpy(&g_drv8434_instance.device_cfg, cfg, sizeof(DRV8434_DeviceCfg_t));
+
+    // Proceed to write all config registers
+    ret_code_t ret_val = RET_SUCCESS;
+    ret_val = drv8434_private_reg_write(DRV8434_REG_CTRL2_ADDR, cfg->ctrl2.raw,
+                                        &g_drv8434_instance);
+    if (ret_val) {
+        return ret_val;
+    }
+
+    ret_val = drv8434_private_reg_write(DRV8434_REG_CTRL3_ADDR, cfg->ctrl3.raw,
+                                        &g_drv8434_instance);
+    if (ret_val) {
+        return ret_val;
+    }
+
+    ret_val = drv8434_private_reg_write(DRV8434_REG_CTRL4_ADDR, cfg->ctrl4.raw,
+                                        &g_drv8434_instance);
+    if (ret_val) {
+        return ret_val;
+    }
+
+    ret_val = drv8434_private_reg_write(DRV8434_REG_CTRL7_ADDR, cfg->ctrl7.raw,
+                                        &g_drv8434_instance);
+    if (ret_val) {
+        return ret_val;
+    }
+
+    return RET_SUCCESS;
+}
+
+ret_code_t
+drv8434_read_config(void)
+{
+    // Proceed to write all config registers
+    ret_code_t ret_val = RET_SUCCESS;
+    ret_val =
+        drv8434_private_reg_read(DRV8434_REG_CTRL2_ADDR, &g_drv8434_instance);
+    if (ret_val) {
+        return ret_val;
+    }
+
+    ret_val = ret_val =
+        drv8434_private_reg_read(DRV8434_REG_CTRL3_ADDR, &g_drv8434_instance);
+    if (ret_val) {
+        return ret_val;
+    }
+
+    ret_val = ret_val =
+        drv8434_private_reg_read(DRV8434_REG_CTRL4_ADDR, &g_drv8434_instance);
+    if (ret_val) {
+        return ret_val;
+    }
+
+    ret_val = ret_val =
+        drv8434_private_reg_read(DRV8434_REG_CTRL7_ADDR, &g_drv8434_instance);
+    if (ret_val) {
+        return ret_val;
+    }
+
+    return RET_SUCCESS;
+}
+
+ret_code_t
+drv8434_enable_stall_guard(void)
+{
+    // Carry over existing bits in CTRL 5
+    DRV8434_CTRL5_REG_t ctrl5 = g_drv8434_instance.registers.ctrl5;
+    // Disable outputs
+    ctrl5.EN_STL = true;
+    return drv8434_private_reg_write(DRV8434_REG_CTRL5_ADDR, ctrl5.raw,
+                                     &g_drv8434_instance);
+}
+
+ret_code_t
+drv8434_scale_current(enum DRV8434_TRQ_DAC_Val current)
+{
+    DRV8434_CTRL1_REG_t ctrl1 = g_drv8434_instance.registers.ctrl1;
+
+    // Apply scale current
+    ctrl1.TRQ_DAC = current;
+    return drv8434_private_reg_write(DRV8434_REG_CTRL1_ADDR, ctrl1.raw,
+                                     &g_drv8434_instance);
+}
+
+ret_code_t
+drv8434_get_register_data(DRV8434_Registers_t *reg)
+{
+    memcpy(reg, &g_drv8434_instance.registers, sizeof(DRV8434_Registers_t));
+    return RET_SUCCESS;
+}

main_board/src/optics/polarizer/drv8434/drv8434.h

@@ -0,0 +1,104 @@
+/******************************************************************************
+ * @file drv8434.h
+ * @brief Header file for Texas Instruments DRV8434 stepper motor driver
+ *
+ * This file declares the application level interface functions for the DRV8434
+ * such as initialize, configure, and control
+ *
+ *
+ * @note All register addresses and bit definitions are based on
+ *       DRV8434 datasheet SLOSE70 – DECEMBER 2020
+ *
+ * @author Srikar Chintapalli
+ *
+ ******************************************************************************/
+
+#include "drv8434_private.h"
+
+/**
+ * @brief Initialize the DRV8434 run-time context
+ *
+ * @param cfg A reference to a driver configuration struct is passed in
+ *
+ * @return Indicates successful initialization of runtime context
+ *
+ * @details This functon is responsible for initializing the DRV8434 run-time
+ *          context with the passed in driver configuration
+ */
+
+ret_code_t
+drv8434_init(DRV8434_DriverCfg_t *cfg);
+
+/**
+ * @brief DRV8434 Disable Outputs of Half Bridges
+ *
+ * @return Indicates successful or unsuccessful operation
+ *
+ *
+ */
+
+ret_code_t
+drv8434_disable(void);
+
+/**
+ * @brief DRV8434 Write the ASIC specific device configuration
+ *
+ *
+ * @return Indicates successful or unsuccessful operation
+ *
+ *
+ */
+
+ret_code_t
+drv8434_write_config(DRV8434_DeviceCfg_t *cfg);
+
+/**
+ * @brief DRV8434 Read back the ASIC specific device configuration
+ *
+ *
+ * @return Indicates successful or unsuccessful operation
+ *
+ *
+ */
+
+ret_code_t
+drv8434_read_config(void);
+
+/**
+ * @brief DRV8434 Enable Stall Guard
+ *
+ *
+ * @return Indicates successful or unsuccessful operation
+ *
+ *
+ */
+
+ret_code_t
+drv8434_enable_stall_guard(void);
+
+/**
+ * @brief DRV8434 Enable Stall Guard
+ *
+ * @param percentage Percentage to scale current
+ *
+ * @return Indicates successful or unsuccessful operation
+ *
+ *
+ */
+
+ret_code_t
+drv8434_scale_current(enum DRV8434_TRQ_DAC_Val current);
+
+/**
+ * @brief DRV8434 Get a copy of register data
+ *
+ * @param reg A reference to a register set struct
+ *
+ * @return Indicates successful or unsuccessful operation
+ *
+ * @details This functon is responsible for copying the run-time context's
+ *          register set into the passed in reference
+ */
+
+ret_code_t
+drv8434_get_register_data(DRV8434_Registers_t *reg);

main_board/src/optics/polarizer/drv8434/drv8434_datatypes.h

@@ -0,0 +1,97 @@
+/******************************************************************************
+ * @file drv8434_datatypes.h
+ * @brief Header file for Texas Instruments DRV8434 stepper motor driver
+ *datatypes and runtime context
+ *
+ * This file defines driver runtime context structs as well
+ *
+ *
+ * @note All register addresses and bit definitions are based on
+ *       DRV8434 datasheet SLOSE70 – DECEMBER 2020
+ *
+ * @author Srikar Chintapalli
+ *
+ ******************************************************************************/
+
+#include <zephyr/device.h>
+#include <zephyr/drivers/spi.h>
+#include <zephyr/kernel.h>
+
+#include "drv8434_defines.h"
+#include "drv8434_registers.h"
+
+// This is the DRV8434 Driver Configuration Struct (communication interface
+// holder)
+typedef struct {
+    // Zephyr (or other) SPI Configuration
+    struct spi_config spi_cfg;
+    const struct device *spi_bus_controller;
+} DRV8434_DriverCfg_t;
+
+// This is the subset of DRV8434 registers that are used for configuring the
+// chip
+typedef struct {
+    DRV8434_CTRL2_REG_t ctrl2;
+    DRV8434_CTRL3_REG_t ctrl3;
+    DRV8434_CTRL3_REG_t ctrl4;
+    DRV8434_CTRL7_REG_t ctrl7;
+} DRV8434_DeviceCfg_t;
+
+// DRV8434 Register set struct
+typedef struct {
+    DRV8434_FAULT_REG_t fault;
+    DRV8434_DIAGSTATUS1_REG_t diag_status1;
+    DRV8434_DIAGSTATUS2_REG_t diag_status2;
+    DRV8434_CTRL1_REG_t ctrl1;
+    DRV8434_CTRL2_REG_t ctrl2;
+    DRV8434_CTRL3_REG_t ctrl3;
+    DRV8434_CTRL4_REG_t ctrl4;
+    DRV8434_CTRL5_REG_t ctrl5;
+    DRV8434_CTRL6_REG_t ctrl6;
+    DRV8434_CTRL7_REG_t ctrl7;
+    DRV8434_CTRL8_REG_t ctrl8;
+    DRV8434_CTRL9_REG_t ctrl9;
+} DRV8434_Registers_t;
+
+typedef struct {
+
+    // Driver Config Copy
+    DRV8434_DriverCfg_t driver_cfg;
+
+    // Device Config Copy ** This usually will not change after assignment
+    // Can be used to check against in case of inadvertent register writes
+    DRV8434_DeviceCfg_t device_cfg;
+
+    // Shadow register copy
+    DRV8434_Registers_t registers;
+
+    // SPI Buffers
+    struct {
+        struct spi_buf rx;
+        struct spi_buf_set rx_bufs;
+        struct spi_buf tx;
+        struct spi_buf_set tx_bufs;
+        uint8_t rx_buffer[DRV8434_SPI_BUFFER_SIZE_MAX];
+        uint8_t tx_buffer[DRV8434_SPI_BUFFER_SIZE_MAX];
+
+        bool spi_busy;
+    } spi;
+
+    // Error handling
+    struct {
+        uint16_t spi_error;
+        uint32_t general_error;
+    } error;
+
+    // Statistics
+    struct {
+        uint32_t transfers_completed;
+        uint32_t spi_tranfer_time;
+    } stats;
+
+    // General Information
+    struct {
+        bool init_done;
+    } general;
+
+} DRV8434_Instance_t;