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WhitleyOpenBoardPkg: Update to Whitley FSP 4.2.0.2A
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This contains binary interface changes and requires FSP 4.2.0.2A or later

Cc: Nate DeSimone <[email protected]>
Cc: Chasel Chiu <[email protected]>
Signed-off-by: Isaac Oram <[email protected]>
Reviewed-by: Nate DeSimone <[email protected]>
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@iworam
iworam committed Jan 18, 2023
1 parent 2e05ad3 commit 3b368b3
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Showing 11 changed files with 416 additions and 120 deletions.
2 changes: 1 addition & 1 deletion Platform/Intel/WhitleyOpenBoardPkg/Cpu/Dxe/PlatformCpuPolicy/PlatformCpuPolicy.c
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Expand Up @@ -364,7 +364,7 @@ PlatformCpuPolicyEntryPoint (
mCpuPolicyConfiguration.Policy.CpuExpandedIioLlcWaysBitMask = SetupData.SocketConfig.SocketProcessorCoreConfiguration.ExpandedIioLlcWaysMask;
mCpuPolicyConfiguration.Policy.CpuRemoteWaysBitMask = SetupData.SocketConfig.SocketProcessorCoreConfiguration.RemoteWaysMask;
mCpuPolicyConfiguration.Policy.CpuRrqCountThreshold = mIioUds->PlatformData.RemoteRequestThreshold;
mCpuPolicyConfiguration.Policy.CpuCrashLogGprs = (SetupData.SocketConfig.SocketProcessorCoreConfiguration.CpuCrashLogGprs > 0) ? TRUE : FALSE;
mCpuPolicyConfiguration.Policy.CpuCrashDataGprs = (SetupData.SocketConfig.SocketProcessorCoreConfiguration.CpuCrashDataGprs > 0) ? TRUE : FALSE;

//CSR SAPM CTL
for( socket = 0; socket < MAX_SOCKET; socket++) {
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1 change: 1 addition & 0 deletions Platform/Intel/WhitleyOpenBoardPkg/Features/Acpi/AcpiTables/Dsdt/CommonPlatform10nm.asi
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Expand Up @@ -186,6 +186,7 @@
If(LEqual(And(CPBF, 0x00000040), 0x00000040)) {
Store(1,HWPS)
}

}
If (CondRefOf (\_SB.OSPC)) {
Return (\_SB.OSPC(Arg0, Arg1, Arg2, Arg3))
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245 changes: 137 additions & 108 deletions Platform/Intel/WhitleyOpenBoardPkg/Features/Pci/Dxe/PciHostBridge/PciRebalance.c
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2 changes: 1 addition & 1 deletion Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/BuildOptions.dsc
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Expand Up @@ -16,7 +16,7 @@
!endif

!if $(DEBUG_FLAGS_ENABLE) == TRUE
DEFINE EDKII_DEBUG_BUILD_OPTIONS = -D DEBUG_CODE_BLOCK=1 -D PLATFORM_VARIABLE_ATTRIBUTES=0x3
DEFINE EDKII_DEBUG_BUILD_OPTIONS = -D PLATFORM_VARIABLE_ATTRIBUTES=0x3
!else
DEFINE EDKII_DEBUG_BUILD_OPTIONS = -D SILENT_MODE -D PLATFORM_VARIABLE_ATTRIBUTES=0x3
!endif
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9 changes: 9 additions & 0 deletions Platform/Intel/WhitleyOpenBoardPkg/Include/Dsc/EnableRichDebugMessages.dsc
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Expand Up @@ -14,6 +14,15 @@
# Customize debug messages
#
[PcdsFixedAtBuild]
## The mask is used to control DebugLib behavior.<BR><BR>
# BIT0 - Enable Debug Assert.<BR>
# BIT1 - Enable Debug Print.<BR>
# BIT2 - Enable Debug Code.<BR>
# BIT3 - Enable Clear Memory.<BR>
# BIT4 - Enable BreakPoint as ASSERT.<BR>
# BIT5 - Enable DeadLoop as ASSERT.<BR>
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F # Enable asserts, prints, code, clear memory, and deadloops on asserts.

## This flag is used to control the built in Debug messages.
# BIT0 - Initialization message.<BR>
# BIT1 - Warning message.<BR>
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3 changes: 3 additions & 0 deletions Platform/Intel/WhitleyOpenBoardPkg/Include/Guid/SetupVariable.h
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Expand Up @@ -670,6 +670,9 @@ typedef struct {
// TCC Mode
//
UINT8 TccMode;
// RAS Fast string Disable option
//
UINT8 DisableFastString;
} SYSTEM_CONFIGURATION;

typedef struct {
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2 changes: 1 addition & 1 deletion Platform/Intel/WhitleyOpenBoardPkg/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.c
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Expand Up @@ -553,7 +553,7 @@ Routine Description:
//
// Update SPI policies
//
PchPolicy->SpiConfig.ShowSpiController = TRUE;
PchPolicy->SpiConfig.ShowSpiController = FALSE;

PchPolicy->PmConfig.PmcReadDisable = TRUE;

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2 changes: 1 addition & 1 deletion ...form/Intel/WhitleyOpenBoardPkg/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLibFsp.c
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Expand Up @@ -561,7 +561,7 @@ Routine Description:
//
// Update SPI policies
//
PchPolicy->SpiConfig.ShowSpiController = TRUE;
PchPolicy->SpiConfig.ShowSpiController = FALSE;

PchPolicy->PmConfig.PmcReadDisable = TRUE;

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6 changes: 5 additions & 1 deletion Platform/Intel/WhitleyOpenBoardPkg/PlatformPkgConfig.dsc
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Expand Up @@ -13,7 +13,11 @@

[Defines]
DEFINE CRB_FLAG_ENABLE = TRUE
DEFINE DEBUG_FLAGS_ENABLE = FALSE
!if $(TARGET) == "RELEASE"
DEFINE DEBUG_FLAGS_ENABLE = FALSE
!else
DEFINE DEBUG_FLAGS_ENABLE = TRUE
!endif

DEFINE SERVER_BIOS_ENABLE = TRUE
DEFINE PCH_SERVER_BIOS_ENABLE = TRUE
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173 changes: 171 additions & 2 deletions Platform/Intel/WhitleyOpenBoardPkg/StructurePcd.dsc
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91 changes: 86 additions & 5 deletions Platform/Intel/WhitleyOpenBoardPkg/StructurePcdCpx.dsc
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Expand Up @@ -76,10 +76,6 @@ gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CbDmaMultiCastEnable|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CoherencySupport|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutGlobal|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutGlobalValue|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[0]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[1]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[2]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[3]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.ConfigIOU0[0]|0xFF
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.ConfigIOU0[1]|0xFF
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.ConfigIOU0[2]|0xFF
Expand Down Expand Up @@ -1664,6 +1660,90 @@ gStructPcdTokenSpaceGuid.PcdSocketIioConfig.PcieCommonClock[80]|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.PcieCommonClock[81]|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.PcieCommonClock[82]|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.PcieCommonClock[83]|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[0]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[1]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[2]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[3]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[4]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[5]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[6]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[7]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[8]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[9]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[10]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[11]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[12]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[13]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[14]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[15]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[16]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[17]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[18]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[19]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[20]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[21]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[22]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[23]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[24]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[25]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[26]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[27]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[28]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[29]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[30]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[31]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[32]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[33]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[34]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[35]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[36]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[37]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[38]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[39]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[40]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[41]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[42]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[43]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[44]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[45]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[46]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[47]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[48]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[49]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[50]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[51]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[52]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[53]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[54]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[55]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[56]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[57]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[58]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[59]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[60]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[61]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[62]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[63]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[64]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[65]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[66]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[67]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[68]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[69]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[70]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[71]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[72]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[73]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[74]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[75]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[76]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[77]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[78]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[79]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[80]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[81]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[82]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.CompletionTimeoutValue[83]|0x9
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.PcieDataLinkFeatureExchangeEnable[0]|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.PcieDataLinkFeatureExchangeEnable[1]|0x1
gStructPcdTokenSpaceGuid.PcdSocketIioConfig.PcieDataLinkFeatureExchangeEnable[2]|0x1
Expand Down Expand Up @@ -2445,6 +2525,7 @@ gStructPcdTokenSpaceGuid.PcdSocketMpLinkConfig.Cpu3P5ReservedS191|0x2
gStructPcdTokenSpaceGuid.PcdSocketMpLinkConfig.Cpu3P5ReservedS246|0x2
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.AdddcErrInjEn|0x1
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ADRDataSaveMode|0x2
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.AdrPatrolScrubDisable|0x0
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ADREn|0x1
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.AdvMemTestCondition|0x1
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.AdvMemTestCondPause|0x186A0
Expand Down Expand Up @@ -2523,7 +2604,7 @@ gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS141|0x0
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS142|0x0
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS75|0x1
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS80|0x4
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS149|0x1
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS149|0x0
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS81[0]|0xFF
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS81[1]|0xFF
gStructPcdTokenSpaceGuid.PcdSocketMemoryConfig.ReservedS81[2]|0xFF
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