InterNoC FPGA hardware
Nowadays, many embedded systems host a significant number of micro-controllers and processors (i.e. IoT devices, vehicles, airplanes, satellites) and as this number continues to increase, traditional bus solutions will start to fail on those platforms as well. Network-on-Chip (NoC) not only offer a scalable solution for MPSoC interconnects but they can also provide a uniform platform of communication to embedded systems with multiple interconnected devices.
This project aims to build an open-source FPGA-based NoC where devices can be connected to each other, transparently, enabling mixed protocol communication between multiple master / slave devices, without the need for a shared bus and at the same time allowing each device to operate in its own clock domain.
https://hackaday.io/project/27083-internoc
The presented FPGA hardware design uses as target the prototype board: https://github.com/cgkiokas/InterNoC